drivers/clk/rockchip/clk-pll.c

214

if (cur_parent == PLL_MODE_NORM) {

drivers/clk/rockchip/clk-pll.c

250

pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);

drivers/clk/rockchip/clk-pll.c

448

if (cur_parent == PLL_MODE_NORM) {

drivers/clk/rockchip/clk-pll.c

485

pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);

drivers/clk/rockchip/clk-pll.c

697

if (cur_parent == PLL_MODE_NORM) {

drivers/clk/rockchip/clk-pll.c

734

pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);

drivers/clk/rockchip/clk-pll.c

948

if (cur_parent == PLL_MODE_NORM) {

drivers/clk/rockchip/clk-pll.c

983

pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);