drivers/gpu/drm/i915/display/intel_pipe_crc.c

141

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_VLV;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

144

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_B_VLV;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

148

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_C_VLV;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

154

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_D_VLV;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

206

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_I9XX;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

211

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_TV_PRE;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

264

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PRIMARY_ILK;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

267

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_SPRITE_ILK;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

270

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_ILK;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

347

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PRIMARY_IVB;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

350

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_SPRITE_IVB;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

353

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PF_IVB;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

375

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_1_SKL;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

378

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_2_SKL;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

381

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_3_SKL;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

384

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_4_SKL;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

387

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_5_SKL;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

390

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_6_SKL;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

393

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_7_SKL;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

396

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DMUX_SKL;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

67

*val = PIPE_CRC_ENABLE | PIPE_CRC_INCLUDE_BORDER_I8XX;