PLL_DIV_WIDTH
0, PLL_DIV_WIDTH, 24, 1, 0, 0, pll_div),
4, PLL_DIV_WIDTH, 25, 1, 0, 0, pll_div),
8, PLL_DIV_WIDTH, 26, 1, 0, 0, pll_div),
12, PLL_DIV_WIDTH, 27, 1, 0, 0, pll_div),
PLL_DIV(CGU_PLL2_CFG0), 0, PLL_DIV_WIDTH, 24, 1, 0, 0,
0, PLL_DIV_WIDTH, 24, 1, 0, 0, pll_div),
PLL_DIV(CGU_PLL0CZ_CFG0), 4, PLL_DIV_WIDTH, 25,
8, PLL_DIV_WIDTH, 26, 1, 0, 0, pll_div),
0, PLL_DIV_WIDTH, 24, 1, 0, 0, pll_div),
0, PLL_DIV_WIDTH, 24, 1, 0, 0, pll_div),
0, PLL_DIV_WIDTH, 24, 1, 0, 0, pll_div),
4, PLL_DIV_WIDTH, 25, 1, 0, 0, pll_div),
8, PLL_DIV_WIDTH, 26, 1, 0, 0, pll_div),
12, PLL_DIV_WIDTH, 27, 1, 0, 0, pll_div),
0, PLL_DIV_WIDTH, 24, 1, 0, 0, pll_div),
8, PLL_DIV_WIDTH, 26, 1, 0, 0, pll_div),
12, PLL_DIV_WIDTH, 27, 1, 0, 0, pll_div),