drivers/clk/at91/clk-pll.c

290

calc_rate = (pll->pms.parent_rate / PLL_DIV(pllr)) *

drivers/clk/at91/clk-pll.c

345

pll->div = PLL_DIV(pllr);

drivers/clk/at91/clk-pll.c

72

div = PLL_DIV(pllr);

drivers/clk/clk-sparx5.c

179

val |= FIELD_PREP(PLL_DIV, conf.div);

drivers/clk/clk-sparx5.c

202

conf.div = FIELD_GET(PLL_DIV, val);

drivers/clk/imx/clk-fracn-gppll.c

176

pll_div = readl_relaxed(pll->base + PLL_DIV);

drivers/clk/imx/clk-fracn-gppll.c

263

writel_relaxed(pll_div, pll->base + PLL_DIV);

drivers/clk/imx/clk-fracn-gppll.c

264

readl(pll->base + PLL_DIV);

drivers/clk/x86/clk-lgm.c

195

LGM_DIV(LGM_CLK_PP_HW, "pp_hw", "pllpp", 0, PLL_DIV(CGU_PLLPP_CFG0),

drivers/clk/x86/clk-lgm.c

197

LGM_DIV(LGM_CLK_PP_UC, "pp_uc", "pllpp", 0, PLL_DIV(CGU_PLLPP_CFG0),

drivers/clk/x86/clk-lgm.c

199

LGM_DIV(LGM_CLK_PP_FXD, "pp_fxd", "pllpp", 0, PLL_DIV(CGU_PLLPP_CFG0),

drivers/clk/x86/clk-lgm.c

201

LGM_DIV(LGM_CLK_PP_TBM, "pp_tbm", "pllpp", 0, PLL_DIV(CGU_PLLPP_CFG0),

drivers/clk/x86/clk-lgm.c

204

PLL_DIV(CGU_PLL2_CFG0), 0, PLL_DIV_WIDTH, 24, 1, 0, 0,

drivers/clk/x86/clk-lgm.c

206

LGM_DIV(LGM_CLK_CM, "cpu_cm", "pll0cz", 0, PLL_DIV(CGU_PLL0CZ_CFG0),

drivers/clk/x86/clk-lgm.c

210

PLL_DIV(CGU_PLL0CZ_CFG0), 4, PLL_DIV_WIDTH, 25,

drivers/clk/x86/clk-lgm.c

213

LGM_DIV(LGM_CLK_SDXC3, "sdxc3", "pll0cz", 0, PLL_DIV(CGU_PLL0CZ_CFG0),

drivers/clk/x86/clk-lgm.c

217

CLK_IGNORE_UNUSED, PLL_DIV(CGU_PLL0CM0_CFG0),

drivers/clk/x86/clk-lgm.c

220

CLK_IGNORE_UNUSED, PLL_DIV(CGU_PLL0CM1_CFG0),

drivers/clk/x86/clk-lgm.c

230

(CLK_IGNORE_UNUSED|CLK_IS_CRITICAL), PLL_DIV(CGU_PLL0B_CFG0),

drivers/clk/x86/clk-lgm.c

233

(CLK_IGNORE_UNUSED|CLK_IS_CRITICAL), PLL_DIV(CGU_PLL0B_CFG0),

drivers/clk/x86/clk-lgm.c

235

LGM_DIV(LGM_CLK_SW, "switch", "pll0b", 0, PLL_DIV(CGU_PLL0B_CFG0),

drivers/clk/x86/clk-lgm.c

237

LGM_DIV(LGM_CLK_QSPI, "qspi", "pll0b", 0, PLL_DIV(CGU_PLL0B_CFG0),

drivers/clk/x86/clk-lgm.c

239

LGM_DIV(LGM_CLK_CT, "v_ct", "pll1", 0, PLL_DIV(CGU_PLL1_CFG0),

drivers/clk/x86/clk-lgm.c

241

LGM_DIV(LGM_CLK_DSP, "v_dsp", "pll1", 0, PLL_DIV(CGU_PLL1_CFG0),

drivers/clk/x86/clk-lgm.c

243

LGM_DIV(LGM_CLK_VIF, "v_ifclk", "pll1", 0, PLL_DIV(CGU_PLL1_CFG0),

drivers/clk/x86/clk-lgm.c

408

PLL_DIV(CGU_LJPLL3_CFG0), 0, PLL_DDIV_WIDTH,

drivers/clk/x86/clk-lgm.c

411

PLL_DIV(CGU_LJPLL3_CFG0), 6, PLL_DDIV_WIDTH,

drivers/clk/x86/clk-lgm.c

414

PLL_DIV(CGU_LJPLL3_CFG0), 12, PLL_DDIV_WIDTH,

drivers/clk/x86/clk-lgm.c

417

PLL_DIV(CGU_LJPLL3_CFG0), 18, PLL_DDIV_WIDTH,

drivers/clk/x86/clk-lgm.c

420

PLL_DIV(CGU_LJPLL4_CFG0), 0, PLL_DDIV_WIDTH,

drivers/mfd/db8500-prcmu.c

1419

if ((branch == PLL_FIX) || ((branch == PLL_DIV) &&

drivers/mfd/db8500-prcmu.c

1495

rate = pll_rate(PRCM_PLLARM_FREQ, ROOT_CLOCK_RATE, PLL_DIV);

drivers/mfd/db8500-prcmu.c

470

CLK_MGT_ENTRY(SGACLK, PLL_DIV, false),

drivers/mfd/db8500-prcmu.c

475

CLK_MGT_ENTRY(SDMMCCLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

477

CLK_MGT_ENTRY(PER1CLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

478

CLK_MGT_ENTRY(PER2CLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

479

CLK_MGT_ENTRY(PER3CLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

480

CLK_MGT_ENTRY(PER5CLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

481

CLK_MGT_ENTRY(PER6CLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

482

CLK_MGT_ENTRY(PER7CLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

484

CLK_MGT_ENTRY(BMLCLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

485

CLK_MGT_ENTRY(HSITXCLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

486

CLK_MGT_ENTRY(HSIRXCLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

488

CLK_MGT_ENTRY(APEATCLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

489

CLK_MGT_ENTRY(APETRACECLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

490

CLK_MGT_ENTRY(MCDECLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

493

CLK_MGT_ENTRY(DMACLK, PLL_DIV, true),

drivers/mfd/db8500-prcmu.c

494

CLK_MGT_ENTRY(B2R2CLK, PLL_DIV, true),