drivers/clk/tegra/clk-tegra114.c

473

.base_reg = PLLU_BASE,

drivers/clk/tegra/clk-tegra114.c

953

CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,

drivers/clk/tegra/clk-tegra124.c

1155

CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,

drivers/clk/tegra/clk-tegra124.c

735

.base_reg = PLLU_BASE,

drivers/clk/tegra/clk-tegra20.c

372

.base_reg = PLLU_BASE,

drivers/clk/tegra/clk-tegra210.c

2302

.base_reg = PLLU_BASE,

drivers/clk/tegra/clk-tegra210.c

2916

reg = readl_relaxed(clk_base + PLLU_BASE);

drivers/clk/tegra/clk-tegra210.c

2921

writel(reg, clk_base + PLLU_BASE);

drivers/clk/tegra/clk-tegra210.c

2924

writel(reg, clk_base + PLLU_BASE);

drivers/clk/tegra/clk-tegra210.c

2932

ret = tegra210_wait_for_mask(&pllu, PLLU_BASE, PLL_BASE_LOCK);

drivers/clk/tegra/clk-tegra210.c

2948

reg = readl_relaxed(clk_base + PLLU_BASE);

drivers/clk/tegra/clk-tegra210.c

2958

reg = readl_relaxed(clk_base + PLLU_BASE);

drivers/clk/tegra/clk-tegra210.c

2960

writel(reg, clk_base + PLLU_BASE);

drivers/clk/tegra/clk-tegra210.c

2980

reg = readl_relaxed(clk_base + PLLU_BASE);

drivers/clk/tegra/clk-tegra210.c

2982

writel_relaxed(reg, clk_base + PLLU_BASE);

drivers/clk/tegra/clk-tegra210.c

3273

clk_base + PLLU_BASE, 16, 4, 0,

drivers/clk/tegra/clk-tegra210.c

3302

CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,

drivers/clk/tegra/clk-tegra210.c

3309

CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,

drivers/clk/tegra/clk-tegra210.c

3316

CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,

drivers/clk/tegra/clk-tegra30.c

480

.base_reg = PLLU_BASE,