PIN_CFG_PUPD
PIN_CFG_PUPD | \
if (!(cfg & PIN_CFG_PUPD))
if (!(cfg & PIN_CFG_PUPD))
RZG2L_GPIO_PORT_SPARSE_PACK(0x2, 0x06, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_GPIO_PORT_SPARSE_PACK(0x2, 0x08, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_GPIO_PORT_PACK(4, 0x09, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
PIN_CFG_PUPD | PIN_CFG_NOD)) },
PIN_CFG_PUPD | PIN_CFG_NOD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD | PIN_CFG_OEN)) },
PIN_CFG_PUPD | PIN_CFG_OEN)) },
PIN_CFG_PUPD | PIN_CFG_OEN)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD | PIN_CFG_OEN)) },
{ "XSPI0_RSTO0N", RZG2L_SINGLE_PIN_PACK(0x7, 5, (PIN_CFG_PUPD)) },
{ "XSPI0_INT0N", RZG2L_SINGLE_PIN_PACK(0x7, 6, (PIN_CFG_PUPD)) },
{ "XSPI0_ECS0N", RZG2L_SINGLE_PIN_PACK(0x7, 7, (PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
{ "ET0_RXCTL_RXDV", RZG2L_SINGLE_PIN_PACK(0x10, 0, (PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
{ "ET0_RXER", RZG2L_SINGLE_PIN_PACK(0x10, 3, (PIN_CFG_PUPD)) },
{ "ET0_RXC_RXCLK", RZG2L_SINGLE_PIN_PACK(0x10, 4, (PIN_CFG_PUPD)) },
PIN_CFG_PUPD | PIN_CFG_OEN)) },
{ "ET0_CRS", RZG2L_SINGLE_PIN_PACK(0x10, 6, (PIN_CFG_PUPD)) },
{ "ET0_COL", RZG2L_SINGLE_PIN_PACK(0x10, 7, (PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
{ "ET0_RXD0", RZG2L_SINGLE_PIN_PACK(0x11, 4, (PIN_CFG_PUPD)) },
{ "ET0_RXD1", RZG2L_SINGLE_PIN_PACK(0x11, 5, (PIN_CFG_PUPD)) },
{ "ET0_RXD2", RZG2L_SINGLE_PIN_PACK(0x11, 6, (PIN_CFG_PUPD)) },
{ "ET0_RXD3", RZG2L_SINGLE_PIN_PACK(0x11, 7, (PIN_CFG_PUPD)) },
PIN_CFG_IEN | PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
{ "ET1_RXCTL_RXDV", RZG2L_SINGLE_PIN_PACK(0x13, 0, (PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
{ "ET1_RXER", RZG2L_SINGLE_PIN_PACK(0x13, 3, (PIN_CFG_PUPD)) },
{ "ET1_RXC_RXCLK", RZG2L_SINGLE_PIN_PACK(0x13, 4, (PIN_CFG_PUPD)) },
PIN_CFG_PUPD | PIN_CFG_OEN)) },
{ "ET1_CRS", RZG2L_SINGLE_PIN_PACK(0x13, 6, (PIN_CFG_PUPD)) },
{ "ET1_COL", RZG2L_SINGLE_PIN_PACK(0x13, 7, (PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
PIN_CFG_PUPD)) },
{ "ET1_RXD0", RZG2L_SINGLE_PIN_PACK(0x14, 4, (PIN_CFG_PUPD)) },
{ "ET1_RXD1", RZG2L_SINGLE_PIN_PACK(0x14, 5, (PIN_CFG_PUPD)) },
{ "ET1_RXD2", RZG2L_SINGLE_PIN_PACK(0x14, 6, (PIN_CFG_PUPD)) },
{ "ET1_RXD3", RZG2L_SINGLE_PIN_PACK(0x14, 7, (PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_PUPD | PIN_CFG_NOD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_PUPD | PIN_CFG_NOD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_RZV2H | PIN_CFG_SR | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_A | PIN_CFG_PUPD | PIN_CFG_PVDD1833_OTH_AWO_POC)) },
(PIN_CFG_IOLH_A | PIN_CFG_PUPD | PIN_CFG_PVDD1833_OTH_AWO_POC)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
(PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_PUPD)) },
has_pupd = !!(caps & PIN_CFG_PUPD);
has_pupd = !!(caps & PIN_CFG_PUPD);
RZG2L_VARIABLE_PIN_CFG_PACK(20, 0, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(20, 1, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(20, 2, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(20, 3, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(20, 4, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(20, 5, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(20, 6, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(20, 7, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(23, 1, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(23, 2, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(23, 3, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(23, 4, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(24, 1, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(24, 2, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(24, 3, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(24, 4, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
RZG2L_VARIABLE_PIN_CFG_PACK(24, 5, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
PIN_CFG_PUPD | \