Symbol: PLLCTL
arch/arm/mach-davinci/pm.c
50
val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
52
__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
57
val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
59
__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
74
val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
76
__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
79
val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
81
__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
87
val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
89
__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
95
val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
arch/arm/mach-davinci/pm.c
98
__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
drivers/clk/davinci/pll.c
312
ctrl = readl(pll->base + PLLCTL);
drivers/clk/davinci/pll.c
317
writel(ctrl, pll->base + PLLCTL);
drivers/clk/davinci/pll.c
323
writel(ctrl, pll->base + PLLCTL);
drivers/clk/davinci/pll.c
329
writel(ctrl, pll->base + PLLCTL);
drivers/clk/davinci/pll.c
335
writel(ctrl, pll->base + PLLCTL);
drivers/clk/davinci/pll.c
914
DEBUG_REG(PLLCTL),
sound/pci/ctxfi/cthw20k1.c
1314
if (hw_read_20kx(hw, PLLCTL) == pllctl)
sound/pci/ctxfi/cthw20k1.c
1317
hw_write_20kx(hw, PLLCTL, pllctl);
sound/pci/ctxfi/cthw20k1.c
1960
data = hw_read_20kx(hw, PLLCTL);
sound/pci/ctxfi/cthw20k1.c
1961
hw_write_20kx(hw, PLLCTL, (data & (~(0x0F<<12))));