PKT_MAXBUF_SIZE
(ndev->mtu > (PKT_MAXBUF_SIZE - VLAN_ETH_HLEN - ETH_FCS_LEN)))
fep->max_buf_size = PKT_MAXBUF_SIZE;
L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
#define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE + 31) & ~31)
#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE + ENET_RX_ALIGN - 1)
W16(ep, fen_mflr, PKT_MAXBUF_SIZE); /* maximum frame length register */
FW(fecp, r_cntrl, PKT_MAXBUF_SIZE << 16);
FW(fecp, r_hash, PKT_MAXBUF_SIZE);