drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

48

#define PIPE_CRC_SOURCE_PIPE_I9XX REG_FIELD_PREP(PIPE_CRC_SOURCE_MASK_I9XX, 0)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

49

#define PIPE_CRC_SOURCE_SDVOB_I9XX REG_FIELD_PREP(PIPE_CRC_SOURCE_MASK_I9XX, 1)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

50

#define PIPE_CRC_SOURCE_SDVOC_I9XX REG_FIELD_PREP(PIPE_CRC_SOURCE_MASK_I9XX, 2)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

52

#define PIPE_CRC_SOURCE_DP_D_G4X REG_FIELD_PREP(PIPE_CRC_SOURCE_MASK_I9XX, 3)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

53

#define PIPE_CRC_SOURCE_TV_PRE REG_FIELD_PREP(PIPE_CRC_SOURCE_MASK_I9XX, 4)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

54

#define PIPE_CRC_SOURCE_TV_POST REG_FIELD_PREP(PIPE_CRC_SOURCE_MASK_I9XX, 5)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

55

#define PIPE_CRC_SOURCE_DP_B_G4X REG_FIELD_PREP(PIPE_CRC_SOURCE_MASK_I9XX, 6)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

56

#define PIPE_CRC_SOURCE_DP_C_G4X REG_FIELD_PREP(PIPE_CRC_SOURCE_MASK_I9XX, 7)