drivers/gpu/drm/i915/gt/gen2_engine_cs.c

104

*cs++ = GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen2_engine_cs.c

114

*cs++ = GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

127

flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL;

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

152

*cs++ = PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

163

PIPE_CONTROL_QW_WRITE |

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

309

flags |= PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

360

PIPE_CONTROL_QW_WRITE |

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

79

*cs++ = PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

127

flags |= PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

151

flags |= PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

293

bit_group_1 |= PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

329

flags |= PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

37

flags |= PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/gen8_engine_cs.h

82

*cs++ = flags1 | PIPE_CONTROL_QW_WRITE;

drivers/gpu/drm/i915/gt/intel_lrc.c

1696

PIPE_CONTROL_QW_WRITE,

drivers/gpu/drm/i915/gt/intel_lrc.c

1768

PIPE_CONTROL_QW_WRITE,

drivers/gpu/drm/xe/xe_ring_ops.c

146

PIPE_CONTROL_QW_WRITE |

drivers/gpu/drm/xe/xe_ring_ops.c

215

u32 flags0 = 0, flags1 = PIPE_CONTROL_GLOBAL_GTT_IVB | PIPE_CONTROL_QW_WRITE;