PHYACC_ATTR_BANK_SMI
if (bank == PHYACC_ATTR_BANK_SMI) {
cmd_seq[i].bank == PHYACC_ATTR_BANK_SMI) {
{ PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_SMI,
{ PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_SMI,
{ PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_SMI,
{ PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_SMI,
{ PHYACC_ATTR_MODE_POLL, PHYACC_ATTR_BANK_SMI,
{ PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI,
{ PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_SMI,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI,
rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI,
rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI,
rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI,