Symbol: PG_CNTL_SF
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
100
PG_CNTL_SF(DOMAIN18_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
101
PG_CNTL_SF(DOMAIN19_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
102
PG_CNTL_SF(DOMAIN19_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
103
PG_CNTL_SF(DOMAIN22_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
104
PG_CNTL_SF(DOMAIN22_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
105
PG_CNTL_SF(DOMAIN23_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
106
PG_CNTL_SF(DOMAIN23_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
107
PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
108
PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
109
PG_CNTL_SF(DOMAIN25_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
110
PG_CNTL_SF(DOMAIN25_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
111
PG_CNTL_SF(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
63
PG_CNTL_SF(DOMAIN0_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
64
PG_CNTL_SF(DOMAIN0_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
65
PG_CNTL_SF(DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
66
PG_CNTL_SF(DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
67
PG_CNTL_SF(DOMAIN2_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
68
PG_CNTL_SF(DOMAIN2_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
69
PG_CNTL_SF(DOMAIN3_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
70
PG_CNTL_SF(DOMAIN3_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
71
PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
72
PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
73
PG_CNTL_SF(DOMAIN17_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
74
PG_CNTL_SF(DOMAIN17_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
75
PG_CNTL_SF(DOMAIN18_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
76
PG_CNTL_SF(DOMAIN18_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
77
PG_CNTL_SF(DOMAIN19_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
78
PG_CNTL_SF(DOMAIN19_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
79
PG_CNTL_SF(DOMAIN22_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
80
PG_CNTL_SF(DOMAIN22_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
81
PG_CNTL_SF(DOMAIN23_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
82
PG_CNTL_SF(DOMAIN23_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
83
PG_CNTL_SF(DOMAIN24_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
84
PG_CNTL_SF(DOMAIN24_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
85
PG_CNTL_SF(DOMAIN25_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
86
PG_CNTL_SF(DOMAIN25_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
87
PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
88
PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
89
PG_CNTL_SF(DOMAIN1_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
90
PG_CNTL_SF(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
91
PG_CNTL_SF(DOMAIN2_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
92
PG_CNTL_SF(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
93
PG_CNTL_SF(DOMAIN3_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
94
PG_CNTL_SF(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
95
PG_CNTL_SF(DOMAIN16_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
96
PG_CNTL_SF(DOMAIN16_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
97
PG_CNTL_SF(DOMAIN17_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
98
PG_CNTL_SF(DOMAIN17_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
99
PG_CNTL_SF(DOMAIN18_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
100
PG_CNTL_SF(DOMAIN1_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
101
PG_CNTL_SF(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
102
PG_CNTL_SF(DOMAIN2_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
103
PG_CNTL_SF(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
104
PG_CNTL_SF(DOMAIN3_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
105
PG_CNTL_SF(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
106
PG_CNTL_SF(DOMAIN16_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
107
PG_CNTL_SF(DOMAIN16_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
108
PG_CNTL_SF(DOMAIN17_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
109
PG_CNTL_SF(DOMAIN17_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
110
PG_CNTL_SF(DOMAIN18_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
111
PG_CNTL_SF(DOMAIN18_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
112
PG_CNTL_SF(DOMAIN19_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
113
PG_CNTL_SF(DOMAIN19_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
114
PG_CNTL_SF(DOMAIN22_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
115
PG_CNTL_SF(DOMAIN22_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
116
PG_CNTL_SF(DOMAIN23_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
117
PG_CNTL_SF(DOMAIN23_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
118
PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
119
PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
120
PG_CNTL_SF(DOMAIN25_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
121
PG_CNTL_SF(DOMAIN25_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
122
PG_CNTL_SF(DOMAIN26_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
123
PG_CNTL_SF(DOMAIN26_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
124
PG_CNTL_SF(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
133
PG_CNTL_SF(DOMAIN0_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
134
PG_CNTL_SF(DOMAIN0_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
135
PG_CNTL_SF(DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
136
PG_CNTL_SF(DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
137
PG_CNTL_SF(DOMAIN2_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
138
PG_CNTL_SF(DOMAIN2_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
139
PG_CNTL_SF(DOMAIN3_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
140
PG_CNTL_SF(DOMAIN3_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
141
PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
142
PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
143
PG_CNTL_SF(DOMAIN17_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
144
PG_CNTL_SF(DOMAIN17_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
145
PG_CNTL_SF(DOMAIN18_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
146
PG_CNTL_SF(DOMAIN18_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
147
PG_CNTL_SF(DOMAIN22_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
148
PG_CNTL_SF(DOMAIN22_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
149
PG_CNTL_SF(DOMAIN23_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
150
PG_CNTL_SF(DOMAIN23_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
151
PG_CNTL_SF(DOMAIN24_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
152
PG_CNTL_SF(DOMAIN24_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
153
PG_CNTL_SF(DOMAIN25_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
154
PG_CNTL_SF(DOMAIN25_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
155
PG_CNTL_SF(DOMAIN26_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
156
PG_CNTL_SF(DOMAIN26_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
157
PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
158
PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
159
PG_CNTL_SF(DOMAIN1_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
160
PG_CNTL_SF(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
161
PG_CNTL_SF(DOMAIN2_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
162
PG_CNTL_SF(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
163
PG_CNTL_SF(DOMAIN3_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
164
PG_CNTL_SF(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
165
PG_CNTL_SF(DOMAIN16_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
166
PG_CNTL_SF(DOMAIN16_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
167
PG_CNTL_SF(DOMAIN17_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
168
PG_CNTL_SF(DOMAIN17_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
169
PG_CNTL_SF(DOMAIN18_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
170
PG_CNTL_SF(DOMAIN18_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
171
PG_CNTL_SF(DOMAIN22_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
172
PG_CNTL_SF(DOMAIN22_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
173
PG_CNTL_SF(DOMAIN23_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
174
PG_CNTL_SF(DOMAIN23_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
175
PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
176
PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
177
PG_CNTL_SF(DOMAIN25_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
178
PG_CNTL_SF(DOMAIN25_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
179
PG_CNTL_SF(DOMAIN26_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
180
PG_CNTL_SF(DOMAIN26_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
181
PG_CNTL_SF(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
72
PG_CNTL_SF(DOMAIN0_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
73
PG_CNTL_SF(DOMAIN0_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
74
PG_CNTL_SF(DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
75
PG_CNTL_SF(DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
76
PG_CNTL_SF(DOMAIN2_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
77
PG_CNTL_SF(DOMAIN2_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
78
PG_CNTL_SF(DOMAIN3_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
79
PG_CNTL_SF(DOMAIN3_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
80
PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
81
PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
82
PG_CNTL_SF(DOMAIN17_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
83
PG_CNTL_SF(DOMAIN17_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
84
PG_CNTL_SF(DOMAIN18_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
85
PG_CNTL_SF(DOMAIN18_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
86
PG_CNTL_SF(DOMAIN19_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
87
PG_CNTL_SF(DOMAIN19_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
88
PG_CNTL_SF(DOMAIN22_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
89
PG_CNTL_SF(DOMAIN22_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
90
PG_CNTL_SF(DOMAIN23_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
91
PG_CNTL_SF(DOMAIN23_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
92
PG_CNTL_SF(DOMAIN24_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
93
PG_CNTL_SF(DOMAIN24_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
94
PG_CNTL_SF(DOMAIN25_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
95
PG_CNTL_SF(DOMAIN25_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
96
PG_CNTL_SF(DOMAIN26_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
97
PG_CNTL_SF(DOMAIN26_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
98
PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
99
PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \