PIC_MASTER_IMR
cached_master_mask = inb(PIC_MASTER_IMR);
outb(0xff, PIC_MASTER_IMR);
inb(PIC_MASTER_IMR);
outb(cached_master_mask, PIC_MASTER_IMR);
~inb(PIC_MASTER_IMR) & ~(1 << PIC_CASCADE_IR);
outb((0xff & ~(1 << I8042_KBD_IRQ)), PIC_MASTER_IMR);
irq_mask = inb(PIC_MASTER_IMR);
outb(irq_mask & ~(1 << PIC_CASCADE_IR), PIC_MASTER_IMR);
inb(PIC_MASTER_IMR);
inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
outb(cached_master_mask, PIC_MASTER_IMR);
outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
outb(probe_val, PIC_MASTER_IMR);
new_val = inb(PIC_MASTER_IMR);
outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
outb_pic(ISA_IRQ_VECTOR(0), PIC_MASTER_IMR);
outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR);
outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
outb(cached_master_mask, PIC_MASTER_IMR);
outb(cached_master_mask, PIC_MASTER_IMR);
inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
outb(cached_master_mask, PIC_MASTER_IMR);
outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
outb_p(I8259A_IRQ_BASE + 0, PIC_MASTER_IMR); /* ICW2: 8259A-1 IR0 mapped to I8259A_IRQ_BASE + 0x00 */
outb_p(1U << PIC_CASCADE_IR, PIC_MASTER_IMR); /* 8259A-1 (the master) has a slave on IR2 */
outb_p(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
outb_p(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
.end = PIC_MASTER_IMR,
outb(cached_master_mask, PIC_MASTER_IMR);
outb(cached_master_mask, PIC_MASTER_IMR);