arch/mips/include/asm/i8259.h

22

#define PIC_MASTER_ISR PIC_MASTER_CMD

arch/mips/include/asm/i8259.h

64

outb(0x0C, PIC_MASTER_CMD); /* prepare for poll */

arch/mips/include/asm/i8259.h

65

irq = inb(PIC_MASTER_CMD) & 7;

arch/mips/loongson2ef/lemote-2f/irq.c

38

isr = inb(PIC_MASTER_CMD) &

arch/x86/include/asm/i8259.h

17

#define PIC_MASTER_ISR PIC_MASTER_CMD

arch/x86/kernel/i8259.c

106

ret = inb(PIC_MASTER_CMD) & mask;

arch/x86/kernel/i8259.c

136

outb(0x0B, PIC_MASTER_CMD); /* ISR register */

arch/x86/kernel/i8259.c

137

value = inb(PIC_MASTER_CMD) & irqmask;

arch/x86/kernel/i8259.c

138

outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */

arch/x86/kernel/i8259.c

186

outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD);

arch/x86/kernel/i8259.c

190

outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */

arch/x86/kernel/i8259.c

362

outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */

drivers/irqchip/irq-i8259.c

117

outb(0x0B, PIC_MASTER_CMD); /* ISR register */

drivers/irqchip/irq-i8259.c

118

value = inb(PIC_MASTER_CMD) & irqmask;

drivers/irqchip/irq-i8259.c

119

outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */

drivers/irqchip/irq-i8259.c

165

outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */

drivers/irqchip/irq-i8259.c

169

outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */

drivers/irqchip/irq-i8259.c

246

outb_p(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */

drivers/irqchip/irq-i8259.c

277

.start = PIC_MASTER_CMD,