PFIT_CONTROL
regs->cdv.savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
REG_WRITE(PFIT_CONTROL, regs->cdv.savePFIT_CONTROL);
pfit_control = REG_READ(PFIT_CONTROL);
REG_WRITE(PFIT_CONTROL, 0);
REG_WRITE(PFIT_CONTROL, pfit_control);
REG_WRITE(PFIT_CONTROL, pfit_control);
pfit_control = REG_READ(PFIT_CONTROL);
REG_WRITE(PFIT_CONTROL, 0);
regs->psb.savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL);
PSB_WVDC32(regs->psb.savePFIT_CONTROL, PFIT_CONTROL);
REG_WRITE(PFIT_CONTROL, 0);
REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
REG_WRITE(PFIT_CONTROL, 0);
pfit_control = REG_READ(PFIT_CONTROL);
lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
REG_WRITE(PFIT_CONTROL, pfit_control);
tmp = intel_de_read(display, PFIT_CONTROL(display));
if (intel_de_read(display, PFIT_CONTROL(display)) & PFIT_VERT_AUTO_SCALE)
intel_de_read(display, PFIT_CONTROL(display)) & PFIT_ENABLE);
intel_de_write(display, PFIT_CONTROL(display),
intel_de_read(display, PFIT_CONTROL(display)));
intel_de_write(display, PFIT_CONTROL(display), 0);
tmp = intel_de_read(display, PFIT_CONTROL(display));