PHY_TST_CTRL0
writel(0x02, base + PHY_TST_CTRL0);
writel(0x00, base + PHY_TST_CTRL0);
writel(0x02, base + PHY_TST_CTRL0);
writel(0x00, base + PHY_TST_CTRL0);
writel(0, base + PHY_TST_CTRL0);
writel(1, base + PHY_TST_CTRL0);
writel(0, base + PHY_TST_CTRL0);
dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK);
dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, 0);
dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK);
dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, 0);
dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK);
dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, 0);
dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLR, 0);
dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLR, PHY_TESTCLR);
dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLR, 0);