PHY_LANE_CFG
rmw_set(PHY_LANE_CFG_REFCLK0REQ, port->phy + PHY_LANE_CFG);
res = readl_relaxed_poll_timeout(port->phy + PHY_LANE_CFG,
rmw_set(PHY_LANE_CFG_REFCLK1REQ, port->phy + PHY_LANE_CFG);
res = readl_relaxed_poll_timeout(port->phy + PHY_LANE_CFG,
rmw_set(PHY_LANE_CFG_REFCLKEN, port->phy + PHY_LANE_CFG);
rmw_set(PHY_LANE_CFG_REFCLKCGEN, port->phy + PHY_LANE_CFG);