PHY_INTERFACE_MODE_QSGMII
[PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,
return PHY_INTERFACE_MODE_QSGMII;
*if_mode = PHY_INTERFACE_MODE_QSGMII;
case PHY_INTERFACE_MODE_QSGMII:
memac_supports(mac_dev, PHY_INTERFACE_MODE_QSGMII))
__set_bit(PHY_INTERFACE_MODE_QSGMII, supported);
else if (mac_dev->phy_if == PHY_INTERFACE_MODE_QSGMII)
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
interface == PHY_INTERFACE_MODE_QSGMII ||
if (state->interface == PHY_INTERFACE_MODE_QSGMII ||
if (phy_mode != PHY_INTERFACE_MODE_QSGMII &&
__set_bit(PHY_INTERFACE_MODE_QSGMII, pp->phylink_config.lpi_interfaces);
__set_bit(PHY_INTERFACE_MODE_QSGMII,
__set_bit(PHY_INTERFACE_MODE_QSGMII,
case PHY_INTERFACE_MODE_QSGMII: /* QSGMII: 4x2G5 devices. Mode Q' */
__set_bit(PHY_INTERFACE_MODE_QSGMII,
case PHY_INTERFACE_MODE_QSGMII:
if (conf->portmode == PHY_INTERFACE_MODE_QSGMII ||
if (conf->portmode == PHY_INTERFACE_MODE_QSGMII) {
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII: /* QSGMII: 4x2G5 devices. Mode Q' */
if (conf->portmode == PHY_INTERFACE_MODE_QSGMII &&
conf->portmode == PHY_INTERFACE_MODE_QSGMII)
if (interface != PHY_INTERFACE_MODE_QSGMII ||
if (ocelot_port->phy_mode == PHY_INTERFACE_MODE_QSGMII)
if ((ocelot_port->phy_mode != PHY_INTERFACE_MODE_QSGMII ||
phy_mode != PHY_INTERFACE_MODE_QSGMII &&
case PHY_INTERFACE_MODE_QSGMII:
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII),
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
PHY_INTERFACE_MODE_QSGMII,
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
if (phydev->interface == PHY_INTERFACE_MODE_QSGMII)
if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) {
if (phydev->interface == PHY_INTERFACE_MODE_QSGMII)
if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) {
if (phydev->interface == PHY_INTERFACE_MODE_QSGMII)
interface != PHY_INTERFACE_MODE_QSGMII)
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
phy_modes(PHY_INTERFACE_MODE_QSGMII)))
priv->package_mode = PHY_INTERFACE_MODE_QSGMII;
case PHY_INTERFACE_MODE_QSGMII:
if (mode == PHY_INTERFACE_MODE_QSGMII)
SERDES_MUX(i, p, PHY_MODE_ETHERNET, PHY_INTERFACE_MODE_QSGMII, m, c)
submode = PHY_INTERFACE_MODE_QSGMII;
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII:
SERDES_MUX(i, p, PHY_MODE_ETHERNET, PHY_INTERFACE_MODE_QSGMII, m, c)
if (submode != PHY_INTERFACE_MODE_QSGMII &&
if (mode == PHY_INTERFACE_MODE_QSGMII) {
case PHY_INTERFACE_MODE_QSGMII:
if (!(soc_data->extra_modes & BIT(PHY_INTERFACE_MODE_QSGMII)))
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII),
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QSGMII: