drivers/net/dsa/mv88e6xxx/chip.c

829

__set_bit(PHY_INTERFACE_MODE_5GBASER, supported);

drivers/net/dsa/mv88e6xxx/pcs-639x.c

420

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/dsa/mv88e6xxx/pcs-639x.c

464

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/dsa/mv88e6xxx/port.c

557

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

1516

interface == PHY_INTERFACE_MODE_5GBASER ||

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

1668

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2215

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

6243

if (port->phy_interface == PHY_INTERFACE_MODE_5GBASER)

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7075

__set_bit(PHY_INTERFACE_MODE_5GBASER,

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7081

} else if (phy_mode == PHY_INTERFACE_MODE_5GBASER) {

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7082

__set_bit(PHY_INTERFACE_MODE_5GBASER,

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7095

else if (phy_mode == PHY_INTERFACE_MODE_5GBASER)

drivers/net/ethernet/mediatek/mtk_eth_soc.h

1491

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/ethernet/microchip/sparx5/sparx5_main.c

377

__set_bit(PHY_INTERFACE_MODE_5GBASER,

drivers/net/ethernet/microchip/sparx5/sparx5_main.h

733

return interface == PHY_INTERFACE_MODE_5GBASER ||

drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c

41

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/ethernet/microchip/sparx5/sparx5_port.c

148

if (port->conf.portmode == PHY_INTERFACE_MODE_5GBASER)

drivers/net/ethernet/microchip/sparx5/sparx5_port.c

176

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/ethernet/microchip/sparx5/sparx5_port.c

252

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/ethernet/microchip/sparx5/sparx5_port.c

806

u32 clk_spd = conf->portmode == PHY_INTERFACE_MODE_5GBASER ? 1 : 0;

drivers/net/ethernet/renesas/rswitch_main.c

1168

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/phy/aquantia/aquantia_main.c

862

interface = PHY_INTERFACE_MODE_5GBASER;

drivers/net/phy/marvell10g.c

1161

__set_bit(PHY_INTERFACE_MODE_5GBASER, mask);

drivers/net/phy/marvell10g.c

1172

__set_bit(PHY_INTERFACE_MODE_5GBASER, mask);

drivers/net/phy/marvell10g.c

1182

__set_bit(PHY_INTERFACE_MODE_5GBASER, mask);

drivers/net/phy/marvell10g.c

798

__set_bit(PHY_INTERFACE_MODE_5GBASER, possible);

drivers/net/phy/marvell10g.c

990

phydev->interface = PHY_INTERFACE_MODE_5GBASER;

drivers/net/phy/phy-core.c

186

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/phy/phy_caps.c

350

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/phy/phylink.c

143

PHY_INTERFACE_MODE_5GBASER,

drivers/net/phy/phylink.c

219

case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */

drivers/net/phy/phylink.c

271

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/phy/phylink.c

819

case PHY_INTERFACE_MODE_5GBASER:

drivers/net/phy/sfp-bus.c

266

__set_bit(PHY_INTERFACE_MODE_5GBASER, interfaces);

drivers/net/phy/sfp-bus.c

357

return PHY_INTERFACE_MODE_5GBASER;

drivers/phy/marvell/phy-mvebu-cp110-comphy.c

225

ETH_CONF(2, 0, PHY_INTERFACE_MODE_5GBASER, 0x1, COMPHY_FW_MODE_XFI),

drivers/phy/marvell/phy-mvebu-cp110-comphy.c

240

ETH_CONF(4, 0, PHY_INTERFACE_MODE_5GBASER, 0x2, COMPHY_FW_MODE_XFI),

drivers/phy/marvell/phy-mvebu-cp110-comphy.c

248

ETH_CONF(4, 1, PHY_INTERFACE_MODE_5GBASER, 0x1, COMPHY_FW_MODE_XFI),

drivers/phy/marvell/phy-mvebu-cp110-comphy.c

798

case PHY_INTERFACE_MODE_5GBASER:

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

102

is_5g = interface == PHY_INTERFACE_MODE_5GBASER;

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

299

case PHY_INTERFACE_MODE_5GBASER:

include/linux/phy.h

261

case PHY_INTERFACE_MODE_5GBASER: