arch/loongarch/kernel/asm-offsets.c

201

DEFINE(_PGD_T_LOG2, PGD_T_LOG2);

arch/mips/include/asm/pgtable-32.h

78

# define __PGD_TABLE_ORDER (32 - 3 * PAGE_SHIFT + PGD_T_LOG2 + PTE_T_LOG2 + 1)

arch/mips/include/asm/pgtable-32.h

80

# define __PGD_TABLE_ORDER (32 - 3 * PAGE_SHIFT + PGD_T_LOG2 + PTE_T_LOG2)

arch/mips/kernel/asm-offsets.c

208

DEFINE(_PGD_T_LOG2, PGD_T_LOG2);

arch/mips/mm/tlbex.c

2451

pwsize |= ((PTE_T_LOG2 - PGD_T_LOG2) << MIPS_PWSIZE_PTEW_SHIFT)

arch/mips/mm/tlbex.c

948

uasm_i_sll(p, tmp, tmp, PGD_T_LOG2);

arch/powerpc/include/asm/nohash/32/mmu-44x.h

151

#define PPC44x_PGD_OFF_SHIFT (32 - PGDIR_SHIFT + PGD_T_LOG2)

arch/powerpc/include/asm/nohash/32/mmu-44x.h

152

#define PPC44x_PGD_OFF_MASK_BIT (PGDIR_SHIFT - PGD_T_LOG2)

arch/powerpc/kernel/asm-offsets.c

635

DEFINE(PGD_T_LOG2, PGD_T_LOG2);