PCP
rcu_pwr_gating_cntl |= PCP(0x77);
rcu_pwr_gating_cntl |= PCP(0x77);
rcu_pwr_gating_cntl |= PCP(0x77);
dpsw_set_field(tmp_conf, PCP, cfg->pcp);
MLXSW_AFK_ELEMENT_INFO_U32(PCP, 0x10, 20, 3),
MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x08, 13, 3),
MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x00, 0, 3),
MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x00, 0, 3),
MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x08, 13, 3),
MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x08, 29, 3),