arch/x86/events/amd/lbr.c

236

[PERF_SAMPLE_BRANCH_COND_SHIFT] = LBR_JCC,

arch/x86/events/intel/lbr.c

1310

[PERF_SAMPLE_BRANCH_COND_SHIFT] = LBR_JCC,

arch/x86/events/intel/lbr.c

1323

[PERF_SAMPLE_BRANCH_COND_SHIFT] = LBR_JCC,

arch/x86/events/intel/lbr.c

1337

[PERF_SAMPLE_BRANCH_COND_SHIFT] = LBR_JCC,

arch/x86/events/intel/lbr.c

1355

[PERF_SAMPLE_BRANCH_COND_SHIFT] = ARCH_LBR_JCC,

arch/x86/events/intel/lbr.c

1665

arch_lbr_ctl_map[PERF_SAMPLE_BRANCH_COND_SHIFT] = LBR_NOT_SUPP;

include/uapi/linux/perf_event.h

228

PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,

tools/include/uapi/linux/perf_event.h

228

PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,

tools/testing/selftests/powerpc/pmu/sampling_tests/bhrb_filter_map_test.c

66

|| i == PERF_SAMPLE_BRANCH_IND_CALL_SHIFT || i == PERF_SAMPLE_BRANCH_COND_SHIFT)