PCLK_UART6
GATE(PCLK_UART6, "pclk_uart6", "pclk_vpu_root", 0,
GATE(PCLK_UART6, "pclk_uart6", "pclk_peri", 0,
GATE(PCLK_UART6, "pclk_uart6", "pclk_bus", 0,
GATE(PCLK_UART6, "pclk_uart6", "pclk_bus_root", 0,
GATE(PCLK_UART6, "pclk_uart6", "pclk_top_root", 0,
GATE(PCLK_UART6, "pclk_uart6", "pclk_bus_root", 0,