arch/x86/events/intel/cstate.c

252

[PERF_CSTATE_PKG_C6_RES] = { MSR_PKG_C6_RESIDENCY, &group_cstate_pkg_c6, test_msr },

arch/x86/events/intel/cstate.c

445

BIT(PERF_CSTATE_PKG_C6_RES) |

arch/x86/events/intel/cstate.c

456

BIT(PERF_CSTATE_PKG_C6_RES) |

arch/x86/events/intel/cstate.c

467

BIT(PERF_CSTATE_PKG_C6_RES) |

arch/x86/events/intel/cstate.c

482

BIT(PERF_CSTATE_PKG_C6_RES) |

arch/x86/events/intel/cstate.c

495

BIT(PERF_CSTATE_PKG_C6_RES) |

arch/x86/events/intel/cstate.c

507

BIT(PERF_CSTATE_PKG_C6_RES),

arch/x86/events/intel/cstate.c

517

BIT(PERF_CSTATE_PKG_C6_RES) |

arch/x86/events/intel/cstate.c

528

BIT(PERF_CSTATE_PKG_C6_RES) |

arch/x86/events/intel/cstate.c

540

BIT(PERF_CSTATE_PKG_C6_RES) |

arch/x86/events/intel/cstate.c

548

.pkg_events = BIT(PERF_CSTATE_PKG_C6_RES),

arch/x86/events/intel/cstate.c

558

BIT(PERF_CSTATE_PKG_C6_RES),

arch/x86/events/intel/cstate.c

570

BIT(PERF_CSTATE_PKG_C6_RES) |

arch/x86/events/intel/cstate.c

586

BIT(PERF_CSTATE_PKG_C6_RES),

arch/x86/events/intel/cstate.c

684

pkg_msr[PERF_CSTATE_PKG_C6_RES].msr = MSR_PKG_C7_RESIDENCY;