PD
PDPOL &= ~PD(1); /* active high signal */
PDIQEG &= ~PD(1);
PDIRQEN |= PD(1); /* IRQ enabled */
#define PD_KB(x) PD(x) /* This is specific for Port D only */
#define PD_KB0 PD(0) /* Use KB0 as PD(0) */
#define PD_KB1 PD(1) /* Use KB1 as PD(1) */
#define PD_KB2 PD(2) /* Use KB2 as PD(2) */
#define PD_KB3 PD(3) /* Use KB3 as PD(3) */
#define PD_KB4 PD(4) /* Use KB4 as PD(4) */
#define PD_KB5 PD(5) /* Use KB5 as PD(5) */
#define PD_KB6 PD(6) /* Use KB6 as PD(6) */
#define PD_KB7 PD(7) /* Use KB7 as PD(7) */
bpi = gct.PD.BootPanelIndex;
dev_priv->gct_data.pt = gct.PD.PanelType;
bpi = gct.PD.BootPanelIndex;
dev_priv->gct_data.pt = gct.PD.PanelType;
} PD;
} PD;
return PVR_PAGE_TABLE_FIELD_GET(1, PD, VALID, entry);
PVR_PAGE_TABLE_FIELD_PREP(1, PD, VALID, true) |
PVR_PAGE_TABLE_FIELD_PREP(1, PD, ENTRY_PENDING, false) |
PVR_PAGE_TABLE_FIELD_PREP(1, PD, PAGE_SIZE, ROGUE_MMUCTRL_PAGE_SIZE_X) |
ctrl->ctrl = NVDEF(NV0073, CTRL_DFP_ELD_AUDIO_CAPS_CTRL, PD, TRUE);
val = PD;
val &= ~PD;
regmap_write(priv->regmap, PHY_CTRL + REG_SET, PD);
CTRL_INIT_MASK | PD, CTRL_INIT_VAL);