PCLK_GPIO3
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_bus_pre", 0, PX30_CLKGATE_CON(15), 10, GFLAGS),
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 12, GFLAGS),
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 12, GFLAGS),
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 11, GFLAGS),
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_pd_alive", 0, RK3288_CLKGATE_CON(14), 3, GFLAGS),
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 15, GFLAGS),
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_bus", 0, RK3328_CLKGATE_CON(16), 10, GFLAGS),
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(22), 3, GFLAGS),
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_alive", 0, RK3399_CLKGATE_CON(31), 4, GFLAGS),
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_lsperi_root", 0,
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_vpu_root", 0,
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_bus", 0,
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_bus_root", 0,
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_top_root", 0,
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_bus_pre", 0,
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_pdbus", 0,
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_vepu_root", 0,