PCI_PM_CTRL_PME_STATUS
PCI_PM_CTRL_PME_STATUS));
pmc |= PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS;
return (data & PCI_PM_CTRL_PME_STATUS) == PCI_PM_CTRL_PME_STATUS;
data |= PCI_PM_CTRL_PME_STATUS;
if (pmcs_reg & PCI_PM_CTRL_PME_STATUS) {
if (!(pmcsr & PCI_PM_CTRL_PME_STATUS))
pmcsr |= PCI_PM_CTRL_PME_STATUS;
pmcsr |= PCI_PM_CTRL_PME_STATUS | PCI_PM_CTRL_PME_ENABLE;
pmcsr &= ~PCI_PM_CTRL_PME_STATUS;
pmcsr |= PCI_PM_CTRL_PME_STATUS;
*ctrl &= ~cpu_to_le16(PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS);
PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS,
~(PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS |
#define PM_OK_BITS (PCI_PM_CTRL_PME_STATUS|PCI_PM_CTRL_DATA_SEL_MASK)