PCI_L1SS_CTL1_L1_2_MASK
PCI_L1SS_CTL1_L1_2_MASK, 0);
PCI_L1SS_CTL1_L1_2_MASK, 0);
pl_l1_2_enable = pl_ctl1 & PCI_L1SS_CTL1_L1_2_MASK;
pl_ctl1 &= ~PCI_L1SS_CTL1_L1_2_MASK;
cl_l1_2_enable = cl_ctl1 & PCI_L1SS_CTL1_L1_2_MASK;
cl_ctl1 &= ~PCI_L1SS_CTL1_L1_2_MASK;
pl1_2_enables = pctl1 & PCI_L1SS_CTL1_L1_2_MASK;
cl1_2_enables = cctl1 & PCI_L1SS_CTL1_L1_2_MASK;
PCI_L1SS_CTL1_L1_2_MASK, 0);
PCI_L1SS_CTL1_L1_2_MASK, 0);