PCI_BASE_ADDRESS_1
pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
ar2315_pci_local_cfg_wr(apc, devfn, PCI_BASE_ADDRESS_1,
out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));
out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
PCI_BASE_ADDRESS_1, res->start);
pci_write_config_dword(sl82c105, PCI_BASE_ADDRESS_1, 0);
early_read_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_1, &pci_membase);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
grpci1_cfg_w32(priv, TGT, 0, PCI_BASE_ADDRESS_1, ahbadr);
addr |= (u64)read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_1) << 32;
pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
pciauto_setup_bars(dev, PCI_BASE_ADDRESS_1);
bar1 = readl(addr + PCI_BASE_ADDRESS_1);
case PCI_BASE_ADDRESS_1:
case PCI_BASE_ADDRESS_1:
memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_1, 0, 4);
ret = pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1,
ret = pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1,
pci_read_config_dword(oct->pci_dev, PCI_BASE_ADDRESS_1, &data32);
dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_1, 0);
dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_1, 0x00000000);
dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_1, 0x0);
dw_pcie_writel_dbi2(dw, PCI_BASE_ADDRESS_1, 0x0);
PCI_BASE_ADDRESS_1,
reg + PCI_BASE_ADDRESS_1);
writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_1);
(offset == PCI_BASE_ADDRESS_1)))
writel_relaxed(upper_32_bits(val), addr + PCI_BASE_ADDRESS_1);
(offset == PCI_BASE_ADDRESS_0 || offset == PCI_BASE_ADDRESS_1))
PCI_BASE_ADDRESS_1,
PCI_BASE_ADDRESS_1,
PCI_BASE_ADDRESS_1,
PCI_BASE_ADDRESS_1,
PCI_BASE_ADDRESS_1,
[PCI_BASE_ADDRESS_1 / 4] = { .ro = ~0 },
pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
gige_pcicfg_write32(dev, PCI_BASE_ADDRESS_1, 0);
vdev->rbar[1] = le32_to_cpu(*(__le32 *)&vconfig[PCI_BASE_ADDRESS_1]);
p_setd(perm, PCI_BASE_ADDRESS_1, ALL_VIRT, ALL_WRITE);
minfo->devflags.fbResource = PCI_BASE_ADDRESS_1;
CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
pci_read_config_dword(pci, PCI_BASE_ADDRESS_1, &bar1);
pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, bar1);