PCIE_BAR_LO_OFF
writel(0, base + PCIE_BAR_LO_OFF(i));
writel(dram->cs[0].base, base + PCIE_BAR_LO_OFF(1));
mvebu_writel(port, 0, PCIE_BAR_LO_OFF(0));
mvebu_writel(port, 0, PCIE_BAR_LO_OFF(i));
mvebu_writel(port, dram->cs[0].base, PCIE_BAR_LO_OFF(1));
mvebu_writel(port, round_down(port->regs.start, SZ_1M), PCIE_BAR_LO_OFF(0));