Symbol: PACKET3_SET_CONFIG_REG_START
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
1802
amdgpu_ring_write(ring, mmSCRATCH_REG0 - PACKET3_SET_CONFIG_REG_START);
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
1832
amdgpu_ring_write(ring, (mmCP_COHER_CNTL2 - PACKET3_SET_CONFIG_REG_START));
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
1909
ib.ptr[1] = mmSCRATCH_REG0 - PACKET3_SET_CONFIG_REG_START;
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
2247
amdgpu_ring_write(ring, mmGDS_COMPUTE_MAX_WAVE_ID - PACKET3_SET_CONFIG_REG_START);
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
6121
amdgpu_ring_write(ring, mmGDS_COMPUTE_MAX_WAVE_ID - PACKET3_SET_CONFIG_REG_START);
drivers/gpu/drm/radeon/evergreen.c
2946
PACKET3_SET_CONFIG_REG_START) >> 2));
drivers/gpu/drm/radeon/evergreen_cs.c
2302
start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START;
drivers/gpu/drm/radeon/evergreen_cs.c
2304
if ((start_reg < PACKET3_SET_CONFIG_REG_START) ||
drivers/gpu/drm/radeon/evergreen_cs.c
3518
start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START;
drivers/gpu/drm/radeon/evergreen_cs.c
3520
if ((start_reg < PACKET3_SET_CONFIG_REG_START) ||
drivers/gpu/drm/radeon/ni.c
1414
PACKET3_SET_CONFIG_REG_START) >> 2));
drivers/gpu/drm/radeon/si.c
3358
radeon_ring_write(ring, (CP_COHER_CNTL2 - PACKET3_SET_CONFIG_REG_START) >> 2);
drivers/gpu/drm/radeon/si.c
3398
PACKET3_SET_CONFIG_REG_START) >> 2));
drivers/gpu/drm/radeon/si.c
3424
radeon_ring_write(ring, (CP_COHER_CNTL2 - PACKET3_SET_CONFIG_REG_START) >> 2);
drivers/gpu/drm/radeon/si.c
4602
start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START;
drivers/gpu/drm/radeon/si.c
4604
if ((start_reg < PACKET3_SET_CONFIG_REG_START) ||