arch/x86/events/intel/p4.c

215

[P4_EVENT_BSQ_ALLOCATION] = { /* shared ESCR, broken CCCR1 */

arch/x86/events/intel/p4.c

216

.opcode = P4_OPCODE(P4_EVENT_BSQ_ALLOCATION),

arch/x86/events/intel/p4.c

219

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_TYPE0) |

arch/x86/events/intel/p4.c

220

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_TYPE1) |

arch/x86/events/intel/p4.c

221

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_LEN0) |

arch/x86/events/intel/p4.c

222

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_LEN1) |

arch/x86/events/intel/p4.c

223

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_IO_TYPE) |

arch/x86/events/intel/p4.c

224

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_LOCK_TYPE) |

arch/x86/events/intel/p4.c

225

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_CACHE_TYPE) |

arch/x86/events/intel/p4.c

226

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_SPLIT_TYPE) |

arch/x86/events/intel/p4.c

227

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_DEM_TYPE) |

arch/x86/events/intel/p4.c

228

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, REQ_ORD_TYPE) |

arch/x86/events/intel/p4.c

229

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, MEM_TYPE0) |

arch/x86/events/intel/p4.c

230

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, MEM_TYPE1) |

arch/x86/events/intel/p4.c

231

P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_ALLOCATION, MEM_TYPE2),