drivers/net/ethernet/ti/icssm/icssm_prueth.c

155

{ .rd_ptr = P0_Q4_BD_OFFSET, .wr_ptr = P0_Q4_BD_OFFSET, },

drivers/net/ethernet/ti/icssm/icssm_prueth.c

200

writew(P0_Q4_BD_OFFSET, sram + 6);

drivers/net/ethernet/ti/icssm/icssm_prueth.c

84

P0_Q4_BD_OFFSET,

drivers/net/ethernet/ti/icssm/icssm_prueth.c

85

P0_Q4_BD_OFFSET + ((HOST_QUEUE_4_SIZE - 1) * BD_SIZE),

drivers/net/ethernet/ti/icssm/icssm_prueth_switch.c

144

P0_Q4_BD_OFFSET,

drivers/net/ethernet/ti/icssm/icssm_prueth_switch.c

145

P0_Q4_BD_OFFSET + ((HOST_QUEUE_4_SIZE - 1) * BD_SIZE),

drivers/net/ethernet/ti/icssm/icssm_prueth_switch.c

55

P0_Q4_BD_OFFSET,

drivers/net/ethernet/ti/icssm/icssm_prueth_switch.c

56

P0_Q4_BD_OFFSET + ((HOST_QUEUE_4_SIZE - 1) * BD_SIZE),

drivers/net/ethernet/ti/icssm/icssm_prueth_switch.c

867

writew(P0_Q4_BD_OFFSET, dram + 6);

drivers/net/ethernet/ti/icssm/icssm_switch.h

297

#define P1_Q1_BD_OFFSET (P0_Q4_BD_OFFSET + HOST_QUEUE_4_SIZE * BD_SIZE)