ATMEL_US_IER
atmel_uart_writel(port, ATMEL_US_IER, ATMEL_US_TIMEOUT);
atmel_uart_writel(port, ATMEL_US_IER, ATMEL_US_TIMEOUT);
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IER, ATMEL_US_RXRDY);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->backup_imr);
atmel_uart_writel(port, ATMEL_US_IER, port->read_status_mask);
atmel_uart_writel(port, ATMEL_US_IER, imr);
atmel_uart_writel(port, ATMEL_US_IER, imr);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->cache.imr);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->tx_done_mask);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->tx_done_mask);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->tx_done_mask);
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IER, ATMEL_US_RXRDY);
atmel_uart_writel(port, ATMEL_US_IER, ier);
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IER,