OUT_RING - Linux

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

104

OUT_RING(ring, 1);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

30

OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

31

OUT_RING(ring, submit->cmd[i].size);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

38

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

42

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

45

OUT_RING(ring, CACHE_FLUSH_TS);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

46

OUT_RING(ring, rbmemptr(ring, fence));

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

47

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

49

OUT_RING(ring, 0x80000000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

63

OUT_RING(ring, 0x000003ff);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

65

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

67

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

69

OUT_RING(ring, REG_A2XX_RB_SURFACE_INFO - 0x2000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

70

OUT_RING(ring, REG_A2XX_PA_SC_WINDOW_OFFSET - 0x2000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

71

OUT_RING(ring, REG_A2XX_VGT_MAX_VTX_INDX - 0x2000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

72

OUT_RING(ring, REG_A2XX_SQ_PROGRAM_CNTL - 0x2000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

73

OUT_RING(ring, REG_A2XX_RB_DEPTHCONTROL - 0x2000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

74

OUT_RING(ring, REG_A2XX_PA_SU_POINT_SIZE - 0x2000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

75

OUT_RING(ring, REG_A2XX_PA_SC_LINE_CNTL - 0x2000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

76

OUT_RING(ring, REG_A2XX_PA_SU_POLY_OFFSET_FRONT_SCALE - 0x2000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

81

OUT_RING(ring, 0x80000300);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

83

OUT_RING(ring, 0x80000180);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

85

OUT_RING(ring, 0x00000001);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

88

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

90

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

93

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

95

OUT_RING(ring, 0x200001f2);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

97

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

99

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

100

OUT_RING(ring, 0x00000154);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

101

OUT_RING(ring, 0x00000001);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

102

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

103

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

104

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

105

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

106

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

48

OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

49

OUT_RING(ring, submit->cmd[i].size);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

56

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

63

OUT_RING(ring, HLSQ_FLUSH);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

67

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

71

OUT_RING(ring, CACHE_FLUSH_TS | CP_EVENT_WRITE_0_IRQ);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

72

OUT_RING(ring, rbmemptr(ring, fence));

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

73

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

78

OUT_RING(ring, CP_REG(REG_A3XX_HLSQ_CL_KERNEL_GROUP_X_REG));

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

79

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

90

OUT_RING(ring, 0x000003f7);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

91

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

92

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

93

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

94

OUT_RING(ring, 0x00000080);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

95

OUT_RING(ring, 0x00000100);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

96

OUT_RING(ring, 0x00000180);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

97

OUT_RING(ring, 0x00006600);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

98

OUT_RING(ring, 0x00000150);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

99

OUT_RING(ring, 0x0000014e);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

161

OUT_RING(ring, 0x000003f7);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

162

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

163

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

164

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

165

OUT_RING(ring, 0x00000080);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

166

OUT_RING(ring, 0x00000100);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

167

OUT_RING(ring, 0x00000180);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

168

OUT_RING(ring, 0x00006600);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

169

OUT_RING(ring, 0x00000150);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

170

OUT_RING(ring, 0x0000014e);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

171

OUT_RING(ring, 0x00000154);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

172

OUT_RING(ring, 0x00000001);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

173

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

174

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

175

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

176

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

177

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

42

OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

43

OUT_RING(ring, submit->cmd[i].size);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

50

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

57

OUT_RING(ring, HLSQ_FLUSH);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

61

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

65

OUT_RING(ring, CACHE_FLUSH_TS | CP_EVENT_WRITE_0_IRQ);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

66

OUT_RING(ring, rbmemptr(ring, fence));

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

67

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

105

OUT_RING(ring, ptr[i]);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

143

OUT_RING(ring, 0x02);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

147

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

151

OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

152

OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

156

OUT_RING(ring, 1);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

164

OUT_RING(ring, 0x0);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

168

OUT_RING(ring, 0x02);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

181

OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

182

OUT_RING(ring, upper_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

183

OUT_RING(ring, submit->cmd[i].size);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

205

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

206

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

207

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

208

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

209

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

213

OUT_RING(ring, 0x01);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

217

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

225

OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(CACHE_FLUSH_TS) |

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

227

OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

228

OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

229

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

238

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

239

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

241

OUT_RING(ring, 0x01);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

243

OUT_RING(ring, 0x01);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

28

OUT_RING(ring, lower_32_bits(shadowptr(a5xx_gpu, ring)));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

29

OUT_RING(ring, upper_32_bits(shadowptr(a5xx_gpu, ring)));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

484

OUT_RING(ring, 0x0000002F);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

487

OUT_RING(ring, 0x00000003);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

490

OUT_RING(ring, 0x20000000);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

493

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

494

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

503

OUT_RING(ring, 0x0000000B);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

506

OUT_RING(ring, 0x00000001);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

509

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

512

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

513

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

530

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

534

OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[ring->id]));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

535

OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[ring->id]));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

539

OUT_RING(ring, 1);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

542

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

545

OUT_RING(ring, 0x01);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

548

OUT_RING(ring, 0x01);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

552

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

553

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

554

OUT_RING(ring, 0x01);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

555

OUT_RING(ring, 0x01);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

972

OUT_RING(gpu->rb[0], CP_EVENT_WRITE_0_EVENT(STAT_EVENT));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

990

OUT_RING(gpu->rb[0], 0x00000000);

drivers/gpu/drm/msm/adreno/a5xx_power.c

231

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a5xx_power.c

235

OUT_RING(ring, lower_32_bits(a5xx_gpu->gpmu_iova));

drivers/gpu/drm/msm/adreno/a5xx_power.c

236

OUT_RING(ring, upper_32_bits(a5xx_gpu->gpmu_iova));

drivers/gpu/drm/msm/adreno/a5xx_power.c

237

OUT_RING(ring, a5xx_gpu->gpmu_dwords);

drivers/gpu/drm/msm/adreno/a5xx_power.c

241

OUT_RING(ring, 1);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1007

OUT_RING(ring, BIT(27));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1026

OUT_RING(ring, mask);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1029

OUT_RING(ring, 0x00000003);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1032

OUT_RING(ring, 0x20000000);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1035

OUT_RING(ring, 0x00000002);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1039

OUT_RING(ring, lower_32_bits(a6xx_gpu->pwrup_reglist_iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1041

OUT_RING(ring, upper_32_bits(a6xx_gpu->pwrup_reglist_iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1043

OUT_RING(ring, BIT(31));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

155

OUT_RING(ring, lower_32_bits(shadowptr(a6xx_gpu, ring)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

156

OUT_RING(ring, upper_32_bits(shadowptr(a6xx_gpu, ring)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1568

OUT_RING(gpu->rb[0], 0x00000000);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

194

OUT_RING(ring, CP_REG_TO_MEM_0_REG(counter) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

197

OUT_RING(ring, lower_32_bits(iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

198

OUT_RING(ring, upper_32_bits(iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

221

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

222

OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

223

OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

224

OUT_RING(ring, submit->seqno - 1);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

227

OUT_RING(ring, CP_THREAD_CONTROL_0_SYNC_THREADS | CP_SET_THREAD_BOTH);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

231

OUT_RING(ring,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

238

OUT_RING(ring, CP_THREAD_CONTROL_0_SYNC_THREADS | CP_SET_THREAD_BOTH);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

241

OUT_RING(ring, LRZ_FLUSH_INVALIDATE);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

244

OUT_RING(ring, CP_THREAD_CONTROL_0_SYNC_THREADS | CP_SET_THREAD_BR);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

251

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

256

OUT_RING(ring, 1);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

258

OUT_RING(ring, 1);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

261

OUT_RING(ring, 1);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

267

OUT_RING(ring, CP_SMMU_TABLE_UPDATE_0_TTBR0_LO(lower_32_bits(ttbr)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

269

OUT_RING(ring,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

272

OUT_RING(ring, CP_SMMU_TABLE_UPDATE_2_CONTEXTIDR(0));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

273

OUT_RING(ring, CP_SMMU_TABLE_UPDATE_3_CONTEXTBANK(0));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

280

OUT_RING(ring, A5XX_CP_MEM_WRITE_ADDR_LO(lower_32_bits(memptr)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

281

OUT_RING(ring, A5XX_CP_MEM_WRITE_ADDR_HI(upper_32_bits(memptr)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

282

OUT_RING(ring, lower_32_bits(ttbr));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

283

OUT_RING(ring, upper_32_bits(ttbr));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

284

OUT_RING(ring, ctx->seqno);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

293

OUT_RING(ring, CP_THREAD_CONTROL_0_SYNC_THREADS | CP_SET_THREAD_BR);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

302

OUT_RING(ring, CACHE_INVALIDATE);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

313

OUT_RING(ring, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_EQ));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

314

OUT_RING(ring, CP_WAIT_REG_MEM_POLL_ADDR_LO(reg_status));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

315

OUT_RING(ring, CP_WAIT_REG_MEM_POLL_ADDR_HI(0));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

316

OUT_RING(ring, CP_WAIT_REG_MEM_3_REF(0x1));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

317

OUT_RING(ring, CP_WAIT_REG_MEM_4_MASK(0x1));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

318

OUT_RING(ring, CP_WAIT_REG_MEM_5_DELAY_LOOP_CYCLES(0));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

323

OUT_RING(ring, 1);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

353

OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(PC_CCU_INVALIDATE_DEPTH));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

356

OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(PC_CCU_INVALIDATE_COLOR));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

369

OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

370

OUT_RING(ring, upper_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

371

OUT_RING(ring, A5XX_CP_INDIRECT_BUFFER_2_IB_SIZE(submit->cmd[i].size));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

394

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

401

OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(CACHE_FLUSH_TS) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

403

OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

404

OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

405

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

419

OUT_RING(ring, SMMU_INFO);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

421

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

422

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

425

OUT_RING(ring, NON_SECURE_SAVE_ADDR);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

426

OUT_RING(ring, lower_32_bits(

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

428

OUT_RING(ring, upper_32_bits(

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

432

OUT_RING(ring, NON_PRIV_SAVE_ADDR);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

433

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

434

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

436

OUT_RING(ring, COUNTER);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

438

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

439

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

445

OUT_RING(ring, lower_32_bits(preempt_postamble));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

446

OUT_RING(ring, upper_32_bits(preempt_postamble));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

447

OUT_RING(ring, CP_SET_AMBLE_2_DWORDS(

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

468

OUT_RING(ring, CP_THREAD_CONTROL_0_SYNC_THREADS | CP_SET_THREAD_BR);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

491

OUT_RING(ring, CP_SET_THREAD_BOTH);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

494

OUT_RING(ring, 0x101); /* IFPC disable */

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

498

OUT_RING(ring, 0x00d); /* IB1LIST start */

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

512

OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

513

OUT_RING(ring, upper_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

514

OUT_RING(ring, A5XX_CP_INDIRECT_BUFFER_2_IB_SIZE(submit->cmd[i].size));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

532

OUT_RING(ring, 0x00e); /* IB1LIST end */

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

541

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

544

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

548

OUT_RING(ring, CP_SET_THREAD_BR);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

551

OUT_RING(ring, CCU_INVALIDATE_DEPTH);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

554

OUT_RING(ring, CCU_INVALIDATE_COLOR);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

557

OUT_RING(ring, CP_SET_THREAD_BV);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

564

OUT_RING(ring, CACHE_CLEAN | BIT(27));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

565

OUT_RING(ring, lower_32_bits(rbmemptr(ring, bv_fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

566

OUT_RING(ring, upper_32_bits(rbmemptr(ring, bv_fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

567

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

570

OUT_RING(ring, CP_SET_THREAD_BR);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

578

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

579

OUT_RING(ring, lower_32_bits(rbmemptr(ring, bv_fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

580

OUT_RING(ring, upper_32_bits(rbmemptr(ring, bv_fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

581

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

587

OUT_RING(ring, CACHE_CLEAN | CP_EVENT_WRITE_0_IRQ | BIT(27));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

588

OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

589

OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

590

OUT_RING(ring, submit->seqno);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

593

OUT_RING(ring, CP_SET_THREAD_BOTH);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

596

OUT_RING(ring, 0x100); /* IFPC enable */

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

608

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

609

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

611

OUT_RING(ring, 0x01);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

613

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

952

OUT_RING(ring, 0);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

958

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

959

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

960

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

962

OUT_RING(ring, 0x00);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

975

OUT_RING(ring, 0x0000002f);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

978

OUT_RING(ring, 0x00000003);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

981

OUT_RING(ring, 0x20000000);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

984

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

985

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

988

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

991

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

992

OUT_RING(ring, 0x00000000);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

396

OUT_RING(ring, BIT(27));

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

412

OUT_RING(ring, mask);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

415

OUT_RING(ring, 0x00000003);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

418

OUT_RING(ring, 0x20000000);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

421

OUT_RING(ring, 0x00000002);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

677

OUT_RING(gpu->rb[0], 0x00000000);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

680

OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));

drivers/gpu/drm/msm/adreno/adreno_gpu.h

688

OUT_RING(ring, CP_TYPE2_PKT);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

695

OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));

drivers/gpu/drm/msm/adreno/adreno_gpu.h

717

OUT_RING(ring, PKT4(regindx, cnt));

drivers/gpu/drm/msm/adreno/adreno_gpu.h

728

OUT_RING(ring, PKT7(opcode, cnt));

drivers/gpu/drm/nouveau/nouveau_dma.c

114

OUT_RING(chan, chan->push.addr | 0x20000000);