arch/arm/mach-omap2/dma.c

36

[REVISION] = { 0x0000, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

37

[GCR] = { 0x0078, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

38

[IRQSTATUS_L0] = { 0x0008, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

39

[IRQSTATUS_L1] = { 0x000c, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

40

[IRQSTATUS_L2] = { 0x0010, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

41

[IRQSTATUS_L3] = { 0x0014, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

42

[IRQENABLE_L0] = { 0x0018, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

43

[IRQENABLE_L1] = { 0x001c, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

44

[IRQENABLE_L2] = { 0x0020, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

45

[IRQENABLE_L3] = { 0x0024, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

46

[SYSSTATUS] = { 0x0028, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

47

[OCP_SYSCONFIG] = { 0x002c, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

48

[CAPS_0] = { 0x0064, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

49

[CAPS_2] = { 0x006c, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

50

[CAPS_3] = { 0x0070, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

51

[CAPS_4] = { 0x0074, 0x00, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

54

[CCR] = { 0x0080, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

55

[CLNK_CTRL] = { 0x0084, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

56

[CICR] = { 0x0088, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

57

[CSR] = { 0x008c, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

58

[CSDP] = { 0x0090, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

59

[CEN] = { 0x0094, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

60

[CFN] = { 0x0098, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

61

[CSEI] = { 0x00a4, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

62

[CSFI] = { 0x00a8, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

63

[CDEI] = { 0x00ac, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

64

[CDFI] = { 0x00b0, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

65

[CSAC] = { 0x00b4, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

66

[CDAC] = { 0x00b8, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

69

[CSSA] = { 0x009c, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

70

[CDSA] = { 0x00a0, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

71

[CCEN] = { 0x00bc, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

72

[CCFN] = { 0x00c0, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

73

[COLOR] = { 0x00c4, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

76

[CDP] = { 0x00d0, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

77

[CNDP] = { 0x00d4, 0x60, OMAP_DMA_REG_32BIT },

arch/arm/mach-omap2/dma.c

78

[CCDN] = { 0x00d8, 0x60, OMAP_DMA_REG_32BIT },

drivers/dma/ti/omap-dma.c

320

case OMAP_DMA_REG_32BIT:

drivers/dma/ti/omap-dma.c

340

case OMAP_DMA_REG_32BIT: