arch/arm/mach-omap2/prcm_mpu44xx.c

30

return readl_relaxed(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));

arch/arm/mach-omap2/prcm_mpu44xx.c

35

writel_relaxed(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));

arch/arm/mach-omap2/prcm_mpu44xx.h

54

#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000)

arch/arm/mach-omap2/prcm_mpu44xx.h

58

#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000)

arch/arm/mach-omap2/prcm_mpu44xx.h

60

#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004)

arch/arm/mach-omap2/prcm_mpu44xx.h

64

#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000)

arch/arm/mach-omap2/prcm_mpu44xx.h

66

#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004)

arch/arm/mach-omap2/prcm_mpu44xx.h

68

#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008)

arch/arm/mach-omap2/prcm_mpu44xx.h

70

#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c)

arch/arm/mach-omap2/prcm_mpu44xx.h

72

#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010)

arch/arm/mach-omap2/prcm_mpu44xx.h

74

#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014)

arch/arm/mach-omap2/prcm_mpu44xx.h

76

#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018)

arch/arm/mach-omap2/prcm_mpu44xx.h

80

#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000)

arch/arm/mach-omap2/prcm_mpu44xx.h

82

#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004)

arch/arm/mach-omap2/prcm_mpu44xx.h

84

#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008)

arch/arm/mach-omap2/prcm_mpu44xx.h

86

#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c)

arch/arm/mach-omap2/prcm_mpu44xx.h

88

#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010)

arch/arm/mach-omap2/prcm_mpu44xx.h

90

#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014)

arch/arm/mach-omap2/prcm_mpu44xx.h

92

#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)