ATMEL_TC_REG
writel(tcb_cache[i].imr, tcaddr + ATMEL_TC_REG(i, IER));
writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(i, CCR));
writel(0xff, regs + ATMEL_TC_REG(2, IDR));
writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
ATMEL_TC_WAVESEL_UP_AUTO, regs + ATMEL_TC_REG(2, CMR));
writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
regs + ATMEL_TC_REG(2, CMR));
writel((tcd->rate + HZ / 2) / HZ, tcaddr + ATMEL_TC_REG(2, RC));
writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
ATMEL_TC_REG(2, CCR));
writel_relaxed(delta, tcaddr + ATMEL_TC_REG(2, RC));
tcaddr + ATMEL_TC_REG(2, CCR));
sr = readl_relaxed(dev->regs + ATMEL_TC_REG(2, SR));
tcaddr + ATMEL_TC_REG(0, CMR));
writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA));
writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC));
writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */
writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
tcaddr + ATMEL_TC_REG(1, CMR));
writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR)); /* no irqs */
writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR));
tcaddr + ATMEL_TC_REG(0, CMR));
writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */
writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
writel(ATMEL_TC_ALL_IRQ, tc.regs + ATMEL_TC_REG(i, IDR));
upper = readl_relaxed(tcaddr + ATMEL_TC_REG(1, CV));
lower = readl_relaxed(tcaddr + ATMEL_TC_REG(0, CV));
} while (upper != readl_relaxed(tcaddr + ATMEL_TC_REG(1, CV)));
return readl_relaxed(tcaddr + ATMEL_TC_REG(0, CV));
tcb_cache[i].cmr = readl(tcaddr + ATMEL_TC_REG(i, CMR));
tcb_cache[i].imr = readl(tcaddr + ATMEL_TC_REG(i, IMR));
tcb_cache[i].rc = readl(tcaddr + ATMEL_TC_REG(i, RC));
tcb_cache[i].clken = !!(readl(tcaddr + ATMEL_TC_REG(i, SR)) &
writel(tcb_cache[i].cmr, tcaddr + ATMEL_TC_REG(i, CMR));
writel(tcb_cache[i].rc, tcaddr + ATMEL_TC_REG(i, RC));
writel(0, tcaddr + ATMEL_TC_REG(i, RA));
writel(0, tcaddr + ATMEL_TC_REG(i, RB));
writel(0xff, tcaddr + ATMEL_TC_REG(i, IDR));
regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), cmr);
regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CCR),
ATMEL_TC_REG(priv->channel[1], CMR), cmr);
ATMEL_TC_REG(priv->channel[1], CCR),
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr);
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);
ATMEL_TC_REG(priv->channel[0], CMR),
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CV), &cnt);
ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RA), &cnt);
ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RB), &cnt);
ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RA), val);
ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RB), val);
ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RC), &cnt);
return regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RC), val);
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr);
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], IMR), &mask);
regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], IDR), ATMEL_TC_DEF_IRQS);
ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], IER), ATMEL_TC_DEF_IRQS);
ret = regmap_update_bits(regmap, ATMEL_TC_REG(priv->channel[0], CMR),
ret = regmap_write(regmap, ATMEL_TC_REG(priv->channel[0], CCR),
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, RC),
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr);
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr);
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr);
ATMEL_TC_REG(tcbpwmc->channel, CCR),
ATMEL_TC_REG(tcbpwmc->channel, CCR),
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr);
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr);
ATMEL_TC_REG(tcbpwmc->channel, RA),
ATMEL_TC_REG(tcbpwmc->channel, RB),
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, RC),
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CCR),
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(channel, CMR), &chan->cmr);
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(channel, RA), &chan->ra);
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(channel, RB), &chan->rb);
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(channel, RC), &chan->rc);
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(channel, CMR), chan->cmr);
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(channel, RA), chan->ra);
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(channel, RB), chan->rb);
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(channel, RC), chan->rc);
ATMEL_TC_REG(channel, CCR));
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr);
ATMEL_TC_REG(tcbpwmc->channel, RA),
ATMEL_TC_REG(tcbpwmc->channel, RB),