Symbol: OMAP1_IO_ADDRESS
arch/arm/mach-omap1/clock.c
541
if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))
arch/arm/mach-omap1/clock.c
543
else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))
arch/arm/mach-omap1/clock.c
545
else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))
arch/arm/mach-omap1/clock.c
547
else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))
arch/arm/mach-omap1/clock.c
549
else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))
arch/arm/mach-omap1/clock.c
562
if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))
arch/arm/mach-omap1/clock.c
564
else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))
arch/arm/mach-omap1/clock.c
566
else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))
arch/arm/mach-omap1/clock.c
568
else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))
arch/arm/mach-omap1/clock.c
570
else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))
arch/arm/mach-omap1/clock.c
586
if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))
arch/arm/mach-omap1/clock.c
588
else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))
arch/arm/mach-omap1/clock.c
590
else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))
arch/arm/mach-omap1/clock.c
592
else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))
arch/arm/mach-omap1/clock.c
594
else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))
arch/arm/mach-omap1/clock.c
607
if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))
arch/arm/mach-omap1/clock.c
609
else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))
arch/arm/mach-omap1/clock.c
611
else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))
arch/arm/mach-omap1/clock.c
613
else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))
arch/arm/mach-omap1/clock.c
615
else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))
arch/arm/mach-omap1/clock_data.c
109
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1),
arch/arm/mach-omap1/clock_data.c
130
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/clock_data.c
147
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/clock_data.c
157
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/clock_data.c
169
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/clock_data.c
180
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/clock_data.c
200
.enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL),
arch/arm/mach-omap1/clock_data.c
270
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
arch/arm/mach-omap1/clock_data.c
277
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
arch/arm/mach-omap1/clock_data.c
289
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
arch/arm/mach-omap1/clock_data.c
307
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/clock_data.c
318
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/clock_data.c
335
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/clock_data.c
348
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/clock_data.c
369
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
arch/arm/mach-omap1/clock_data.c
389
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
arch/arm/mach-omap1/clock_data.c
405
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
arch/arm/mach-omap1/clock_data.c
422
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
arch/arm/mach-omap1/clock_data.c
442
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
arch/arm/mach-omap1/clock_data.c
454
.enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
arch/arm/mach-omap1/clock_data.c
464
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
arch/arm/mach-omap1/clock_data.c
475
.enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
arch/arm/mach-omap1/clock_data.c
484
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
arch/arm/mach-omap1/clock_data.c
493
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
arch/arm/mach-omap1/clock_data.c
502
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
arch/arm/mach-omap1/clock_data.c
511
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
arch/arm/mach-omap1/clock_data.c
519
.enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL),
arch/arm/mach-omap1/clock_data.c
536
.enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL),
arch/arm/mach-omap1/clock_data.c
549
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
arch/arm/mach-omap1/clock_data.c
563
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
arch/arm/mach-omap1/clock_data.c
573
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
arch/arm/mach-omap1/clock_data.c
99
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
arch/arm/mach-omap1/io.c
101
__raw_writew(v, OMAP1_IO_ADDRESS(pa));
arch/arm/mach-omap1/io.c
107
__raw_writel(v, OMAP1_IO_ADDRESS(pa));
arch/arm/mach-omap1/io.c
77
return __raw_readb(OMAP1_IO_ADDRESS(pa));
arch/arm/mach-omap1/io.c
83
return __raw_readw(OMAP1_IO_ADDRESS(pa));
arch/arm/mach-omap1/io.c
89
return __raw_readl(OMAP1_IO_ADDRESS(pa));
arch/arm/mach-omap1/io.c
95
__raw_writeb(v, OMAP1_IO_ADDRESS(pa));
arch/arm/mach-omap1/mtd-xip.h
27
((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
arch/arm/mach-omap1/pm.h
44
#define CLKGEN_REG_ASM_BASE OMAP1_IO_ADDRESS(0xfffece00)
arch/arm/mach-omap1/pm.h
48
#define TCMIF_ASM_BASE OMAP1_IO_ADDRESS(0xfffecc00)
arch/arm/mach-omap1/reset.c
51
rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST));
arch/arm/mach-omap1/time.c
71
((omap_mpu_timer_regs_t __iomem *)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \