drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

26

case NVKM_ACR_LSF_GPCCS : return "gpccs";

drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c

329

ret = nvkm_acr_lsfw_load_bl_sig_net(subdev, &gr->gpccs.falcon, NVKM_ACR_LSF_GPCCS,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

1770

if (!nvkm_acr_managed_falcon(device, NVKM_ACR_LSF_GPCCS)) {

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

1774

lsf_mask |= BIT(NVKM_ACR_LSF_GPCCS);

drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c

235

NVKM_ACR_LSF_GPCCS,

drivers/gpu/drm/nouveau/nvkm/engine/sec2/ga102.c

116

BIT_ULL(NVKM_ACR_LSF_GPCCS) |

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

116

BIT_ULL(NVKM_ACR_LSF_GPCCS) |

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

277

BIT_ULL(NVKM_ACR_LSF_GPCCS) |

drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c

339

BIT_ULL(NVKM_ACR_LSF_GPCCS),

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c

120

BIT_ULL(NVKM_ACR_LSF_GPCCS),

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c

73

BIT_ULL(NVKM_ACR_LSF_GPCCS),