O
unittest(!ni_route_set_has_source(&DR.routes[0], O(0)),
unittest(ni_route_set_has_source(&DR.routes[0], O(1)),
unittest(ni_route_set_has_source(&DR.routes[0], O(5)),
unittest(ni_route_set_has_source(&DR.routes[0], O(9)),
unittest(ni_route_to_register(O(0), O(0), T) < 0,
unittest(ni_route_to_register(O(1), O(0), T) == 1,
unittest(ni_route_to_register(O(6), O(5), T) == 6,
unittest(ni_route_to_register(O(8), O(9), T) == 8,
unittest(ni_lookup_route_register(O(0), O(0), T) == -EINVAL,
unittest(ni_lookup_route_register(O(1), O(0), T) == 1,
unittest(ni_lookup_route_register(O(6), O(5), T) == 6,
unittest(ni_lookup_route_register(O(8), O(9), T) == 8,
unittest(ni_lookup_route_register(O(10), O(9), T) == -EINVAL,
unittest(!route_is_valid(O(0), O(0), T),
unittest(route_is_valid(O(0), O(1), T),
unittest(route_is_valid(O(5), O(6), T),
unittest(route_is_valid(O(8), O(9), T),
static const int bad_dest = O(8), dest0 = O(0), desti = O(5);
unittest(pair_data[0] == O(1),
unittest(pair_data[1] == O(0),
unittest(ni_find_route_source(4, O(4), T) == -EINVAL,
unittest(ni_find_route_source(0, O(1), T) == O(0),
unittest(ni_find_route_source(4, O(6), T) == O(4),
unittest(ni_find_route_source(9, O(8), T) == O(9),
static const int no_val_dest = O(7), no_val_index = 4;
unittest(ni_find_route_source(8, O(9), T) == O(8),
unittest(!route_register_is_valid(4, O(4), T),
unittest(route_register_is_valid(0, O(1), T),
unittest(route_register_is_valid(4, O(6), T),
unittest(route_register_is_valid(9, O(8), T),
unittest(ni_check_trigger_arg(0, O(0), T) == -EINVAL,
unittest(ni_check_trigger_arg(0, O(1), T) == 0,
unittest(ni_check_trigger_arg(4, O(6), T) == 0,
#define rgout0_src0 (O(100))
unittest(ni_check_trigger_arg(9, O(8), T) == 0,
unittest(ni_check_trigger_arg_roffs(-1, O(0), T, 1) == -EINVAL,
unittest(ni_check_trigger_arg_roffs(0, O(1), T, 0) == 0,
unittest(ni_check_trigger_arg_roffs(3, O(6), T, 1) == 0,
unittest(ni_check_trigger_arg_roffs(7, O(8), T, 2) == 0,
#define rgout0_src1 (O(101))
unittest(ni_check_trigger_arg(O(0), O(0), T) == -EINVAL,
unittest(ni_check_trigger_arg(O(0), O(1), T) == 0,
unittest(ni_check_trigger_arg(O(5), O(6), T) == 0,
unittest(ni_check_trigger_arg(O(8), O(9), T) == 0,
#define brd0_src0 (O(110))
unittest(ni_get_reg_value(0, O(0), T) == -1,
unittest(ni_get_reg_value(0, O(1), T) == 0,
#define brd0_src1 (O(111))
unittest(ni_get_reg_value(4, O(6), T) == 4,
unittest(ni_get_reg_value(9, O(8), T) == 9,
unittest(ni_get_reg_value_roffs(-1, O(0), T, 1) == -1,
unittest(ni_get_reg_value_roffs(0, O(1), T, 0) == 0,
#define brd1_src0 (O(120))
unittest(ni_get_reg_value_roffs(3, O(6), T, 1) == 4,
unittest(ni_get_reg_value_roffs(7, O(8), T, 2) == 9,
unittest(ni_get_reg_value(O(0), O(0), T) == -1,
unittest(ni_get_reg_value(O(0), O(1), T) == 0,
unittest(ni_get_reg_value(O(5), O(6), T) == 5,
#define brd1_src1 (O(121))
unittest(ni_get_reg_value(O(8), O(9), T) == 8,
#define brd2_src0 (O(130))
#define brd2_src1 (O(131))
#define brd3_src0 (O(140))
#define brd3_src1 (O(141))
O(x1), O(x2), O(x3), O(x4), O(x5), O(x6), O(x7), O(x8), O(x9), \
{.dest = O(0), .src = O9(/**/1, 2, 3, 4, 5, 6, 7, 8, 9)},
{.dest = O(1), .src = O9(0, /**/2, 3, 4, 5, 6, 7, 8, 9)},
{.dest = O(5), .src = O9(0, 1, 2, 3, 4,/**/ 6, 7, 8, 9)},
{.dest = O(6), .src = O9(0, 1, 2, 3, 4, 5,/**/ 7, 8, 9)},
{.dest = O(7), .src = O9(0, 1, 2, 3, 4, 5, 6,/**/ 8, 9)},
{.dest = O(9), .src = O9(0, 1, 2, 3, 4, 5, 6, 7, 8/**/)},
TEGRA186_MAIN_GPIO_PORT( O, 0, 1, 4),
TEGRA194_MAIN_GPIO_PORT( O, 5, 0, 6),
#define MIPI_TXm_HS_FGn_SECTo_PH(M, N, O) (MIPI_TX0_HS_FG0_SECT0_PH + \
+ (8 * (O)))
#define MIPI_TXm_HS_FGn_SECTo_LINE_CFG(M, N, O) \
+ (0x2C * (N)) + (8 * (O)))
#define PUSH_(A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,Q,R,S,T,U,V,W,X,IMPL,...) IMPL
#define PUSH_NV_(A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,Q,R,S,T,U,V,W,X,IMPL,...) IMPL
s32 S, O, X;
O = T5403_C(6) * 0x4000 + T5403_C(7) * t_r / 8 +
X = (S * p_r + O) / 0x4000;
#define PtrOffset(B, O) ((size_t)((size_t)(O) - (size_t)(B)))