NvRegMisc1
u32 regmisc = readl(base + NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX;
writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1);
writel(regmisc, base + NvRegMisc1);
base + NvRegMisc1);
base + NvRegMisc1);
misc1_flags = readl(base + NvRegMisc1);
writel(NVREG_MISC1_FORCE, base + NvRegMisc1);
writel(misc1_flags, base + NvRegMisc1);
writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1);
{ NvRegMisc1, 0x03c },