NXP_C45_REG_FIELD
NXP_C45_REG_FIELD(0x8352, MDIO_MMD_VEND1, 8, 6), },
NXP_C45_REG_FIELD(0x8352, MDIO_MMD_VEND1, 0, 6), },
NXP_C45_REG_FIELD(0x8353, MDIO_MMD_VEND1, 10, 6), },
NXP_C45_REG_FIELD(0x8353, MDIO_MMD_VEND1, 0, 10), },
NXP_C45_REG_FIELD(0x8350, MDIO_MMD_VEND1, 0, 16) },
NXP_C45_REG_FIELD(0xAFCE, MDIO_MMD_VEND1, 0, 6), },
NXP_C45_REG_FIELD(0xAFCF, MDIO_MMD_VEND1, 0, 6), },
NXP_C45_REG_FIELD(0xAFD0, MDIO_MMD_VEND1, 0, 9), },
NXP_C45_REG_FIELD(0xAFD1, MDIO_MMD_VEND1, 0, 9), },
NXP_C45_REG_FIELD(0x8351, MDIO_MMD_VEND1, 0, 14) },
NXP_C45_REG_FIELD(0xACA1, MDIO_MMD_VEND1, 0, 8), },
NXP_C45_REG_FIELD(0xACA0, MDIO_MMD_VEND1, 0, 16), },
NXP_C45_REG_FIELD(0xACA3, MDIO_MMD_VEND1, 0, 8), },
NXP_C45_REG_FIELD(0xACA2, MDIO_MMD_VEND1, 0, 16), },
NXP_C45_REG_FIELD(0xACA5, MDIO_MMD_VEND1, 0, 8), },
NXP_C45_REG_FIELD(0xACA4, MDIO_MMD_VEND1, 0, 16), },
NXP_C45_REG_FIELD(0xACA7, MDIO_MMD_VEND1, 0, 8), },
NXP_C45_REG_FIELD(0xACA6, MDIO_MMD_VEND1, 0, 16), },
NXP_C45_REG_FIELD(0x1102, MDIO_MMD_VEND1, 3, 1),
NXP_C45_REG_FIELD(0x1102, MDIO_MMD_VEND1, 2, 1),
NXP_C45_REG_FIELD(0x1115, MDIO_MMD_VEND1, 0, 1),
NXP_C45_REG_FIELD(0x1105, MDIO_MMD_VEND1, 2, 1),
NXP_C45_REG_FIELD(0x1105, MDIO_MMD_VEND1, 0, 1),
NXP_C45_REG_FIELD(0x1131, MDIO_MMD_VEND1, 0, 1),
NXP_C45_REG_FIELD(0x1132, MDIO_MMD_VEND1, 0, 1),
NXP_C45_REG_FIELD(0x114E, MDIO_MMD_VEND1, 0, 8),
NXP_C45_REG_FIELD(0x114E, MDIO_MMD_VEND1, 8, 4),
NXP_C45_REG_FIELD(0x114F, MDIO_MMD_VEND1, 0, 16),
NXP_C45_REG_FIELD(0x1151, MDIO_MMD_VEND1, 14, 2),
NXP_C45_REG_FIELD(0x114E, MDIO_MMD_VEND1, 12, 3),
NXP_C45_REG_FIELD(0x1150, MDIO_MMD_VEND1, 0, 16),
NXP_C45_REG_FIELD(0x1151, MDIO_MMD_VEND1, 0, 14),
NXP_C45_REG_FIELD(0x8330, MDIO_MMD_VEND1, 13, 1),
NXP_C45_REG_FIELD(0x8330, MDIO_MMD_VEND1, 0, 3),
NXP_C45_REG_FIELD(0x1006, MDIO_MMD_VEND1, 4, 1),
NXP_C45_REG_FIELD(0x1006, MDIO_MMD_VEND1, 5, 1),
NXP_C45_REG_FIELD(0x1006, MDIO_MMD_VEND1, 2, 1),
NXP_C45_REG_FIELD(0x1000, MDIO_MMD_VEND1, 1, 1),
NXP_C45_REG_FIELD(0x1000, MDIO_MMD_VEND1, 2, 1),
NXP_C45_REG_FIELD(0x900A, MDIO_MMD_VEND1, 1, 1),
NXP_C45_REG_FIELD(0x900C, MDIO_MMD_VEND1, 1, 1),
NXP_C45_REG_FIELD(0x9061, MDIO_MMD_VEND1, 8, 8),
NXP_C45_REG_FIELD(0x9061, MDIO_MMD_VEND1, 4, 4),
NXP_C45_REG_FIELD(0x9062, MDIO_MMD_VEND1, 0, 16),
NXP_C45_REG_FIELD(0x9065, MDIO_MMD_VEND1, 0, 2),
NXP_C45_REG_FIELD(0x9065, MDIO_MMD_VEND1, 2, 3),
NXP_C45_REG_FIELD(0x9063, MDIO_MMD_VEND1, 0, 16),
NXP_C45_REG_FIELD(0x9064, MDIO_MMD_VEND1, 0, 14),
NXP_C45_REG_FIELD(0x8361, MDIO_MMD_VEND1, 15, 1),
NXP_C45_REG_FIELD(0x8361, MDIO_MMD_VEND1, 0, 3),