drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1052

num_memps = (clock_table->NumMemPstatesEnabled > NUM_MEM_PSTATE_LEVELS) ? NUM_MEM_PSTATE_LEVELS :

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1392

for (i = 0; i < NUM_MEM_PSTATE_LEVELS; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h

114

MemPstateTable_t MemPstateTable[NUM_MEM_PSTATE_LEVELS];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h

142

MemPstateTable_t MemPstateTable[NUM_MEM_PSTATE_LEVELS];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

1003

ASSERT(dpm_clks->NumMemPstatesEnabled <= NUM_MEM_PSTATE_LEVELS);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

1004

if (dpm_clks->NumMemPstatesEnabled > NUM_MEM_PSTATE_LEVELS)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

1005

dpm_clks->NumMemPstatesEnabled = NUM_MEM_PSTATE_LEVELS;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

961

for (i = 0; i < NUM_MEM_PSTATE_LEVELS; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.h

116

MemPstateTable_t MemPstateTable[NUM_MEM_PSTATE_LEVELS];

drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0_0.h

132

MemPstateTable_t MemPstateTable[NUM_MEM_PSTATE_LEVELS];

drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0_0.h

163

MemPstateTable_t MemPstateTable[NUM_MEM_PSTATE_LEVELS];

drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu15_driver_if_v15_0_0.h

131

MemPstateTable_t MemPstateTable[NUM_MEM_PSTATE_LEVELS];

drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu15_driver_if_v15_0_0.h

159

MemPstateTable_t MemPstateTable[NUM_MEM_PSTATE_LEVELS];