Symbol: NV_DECLARE_ALIGNED
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/device.h
19
NV_DECLARE_ALIGNED(NvU64 vaSpaceSize, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/device.h
20
NV_DECLARE_ALIGNED(NvU64 vaStartInternal, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/device.h
21
NV_DECLARE_ALIGNED(NvU64 vaLimitInternal, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/disp.h
13
NV_DECLARE_ALIGNED(NvU64 instMemPhysAddr, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/disp.h
14
NV_DECLARE_ALIGNED(NvU64 instMemSize, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/disp.h
705
NV_DECLARE_ALIGNED(NvU64 physicalAddr, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/disp.h
706
NV_DECLARE_ALIGNED(NvU64 limit, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/disp.h
98
NV_DECLARE_ALIGNED(NvU64 vbiosAddress, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/event.h
19
NV_DECLARE_ALIGNED(NvP64 data, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fbsr.h
102
NV_DECLARE_ALIGNED(NvU64 vidOffset, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fbsr.h
103
NV_DECLARE_ALIGNED(NvU64 sysOffset, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fbsr.h
104
NV_DECLARE_ALIGNED(NvU64 size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fbsr.h
93
NV_DECLARE_ALIGNED(NvU64 gspFbAllocsSysOffset, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
150
NV_DECLARE_ALIGNED(NvU64 base, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
151
NV_DECLARE_ALIGNED(NvU64 size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
164
NV_DECLARE_ALIGNED(NvU64 gpFifoOffset, 8); // offset to beginning of GP FIFO
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
177
NV_DECLARE_ALIGNED(NvU64 userdOffset[NV_MAX_SUBDEVICES], 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
187
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS instanceMem, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
188
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS userdMem, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
189
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS ramfcMem, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
190
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS mthdbufMem, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
194
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS errorNotifierMem, 8); // reserved
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
195
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS eccErrorNotifierMem, 8); // reserved
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
318
NV_DECLARE_ALIGNED(NvU64 gpuPhysAddr, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
319
NV_DECLARE_ALIGNED(NvU64 gpuVirtAddr, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
320
NV_DECLARE_ALIGNED(NvU64 size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
335
NV_DECLARE_ALIGNED(NvU64 virtAddress, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
336
NV_DECLARE_ALIGNED(NvU64 size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h
339
NV_DECLARE_ALIGNED(NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY promoteEntry[NV2080_CTRL_GPU_PROMOTE_CONTEXT_MAX_ENTRIES], 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
18
NV_DECLARE_ALIGNED(NvU64 base, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
19
NV_DECLARE_ALIGNED(NvU64 limit, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
20
NV_DECLARE_ALIGNED(NvU64 reserved, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
30
NV_DECLARE_ALIGNED(NV2080_CTRL_CMD_FB_GET_FB_REGION_FB_REGION_INFO fbRegion[NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_MAX_ENTRIES], 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
81
NV_DECLARE_ALIGNED(NvU64 FirstVFBar0Address, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
815
NV_DECLARE_ALIGNED(rpc_message_header_v rpc, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
82
NV_DECLARE_ALIGNED(NvU64 FirstVFBar1Address, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
83
NV_DECLARE_ALIGNED(NvU64 FirstVFBar2Address, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
84
NV_DECLARE_ALIGNED(NvU64 bar0Size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
85
NV_DECLARE_ALIGNED(NvU64 bar1Size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h
86
NV_DECLARE_ALIGNED(NvU64 bar2Size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/vmm.h
100
NV_DECLARE_ALIGNED(NvU64 physAddress, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/vmm.h
51
NV_DECLARE_ALIGNED(NvU64 pageSize, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/vmm.h
57
NV_DECLARE_ALIGNED(NvU64 virtAddrLo, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/vmm.h
63
NV_DECLARE_ALIGNED(NvU64 virtAddrHi, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/vmm.h
77
NV_DECLARE_ALIGNED(NvU64 physAddress, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/vmm.h
82
NV_DECLARE_ALIGNED(NvU64 size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/client.h
19
NV_DECLARE_ALIGNED(NvP64 pOsPidInfo, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/disp.h
301
NV_DECLARE_ALIGNED(NvU64 physicalAddr, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/disp.h
302
NV_DECLARE_ALIGNED(NvU64 limit, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fbsr.h
16
NV_DECLARE_ALIGNED(NvU64 sysmemAddrOfSuspendResumeData, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
14
NV_DECLARE_ALIGNED(NvU64 base, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
15
NV_DECLARE_ALIGNED(NvU64 size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
28
NV_DECLARE_ALIGNED(NvU64 gpFifoOffset, 8); // offset to beginning of GP FIFO
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
41
NV_DECLARE_ALIGNED(NvU64 userdOffset[NV_MAX_SUBDEVICES], 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
51
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS instanceMem, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
52
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS userdMem, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
53
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS ramfcMem, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
54
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS mthdbufMem, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
58
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS errorNotifierMem, 8); // reserved
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h
59
NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS eccErrorNotifierMem, 8); // reserved
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
18
NV_DECLARE_ALIGNED(NvU64 base, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
19
NV_DECLARE_ALIGNED(NvU64 limit, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
20
NV_DECLARE_ALIGNED(NvU64 reserved, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
30
NV_DECLARE_ALIGNED(NV2080_CTRL_CMD_FB_GET_FB_REGION_FB_REGION_INFO fbRegion[NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_MAX_ENTRIES], 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
62
NV_DECLARE_ALIGNED(NvU64 FirstVFBar0Address, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
63
NV_DECLARE_ALIGNED(NvU64 FirstVFBar1Address, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
64
NV_DECLARE_ALIGNED(NvU64 FirstVFBar2Address, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
65
NV_DECLARE_ALIGNED(NvU64 bar0Size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
66
NV_DECLARE_ALIGNED(NvU64 bar1Size, 8);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h
67
NV_DECLARE_ALIGNED(NvU64 bar2Size, 8);