drivers/gpu/drm/nouveau/dispnv04/crtc.c

687

crtc_state->CRTC[NV_CIO_CRE_LCD__INDEX] = crtc_saved->CRTC[NV_CIO_CRE_LCD__INDEX];

drivers/gpu/drm/nouveau/dispnv04/dfp.c

109

crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX] &=

drivers/gpu/drm/nouveau/dispnv04/dfp.c

252

uint8_t *cr_lcd = &crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX];

drivers/gpu/drm/nouveau/dispnv04/dfp.c

253

uint8_t *cr_lcd_oth = &crtcstate[head ^ 1].CRTC[NV_CIO_CRE_LCD__INDEX];

drivers/gpu/drm/nouveau/dispnv04/dfp.c

272

NV_CIO_CRE_LCD__INDEX,

drivers/gpu/drm/nouveau/dispnv04/hw.c

597

rd_cio_state(dev, head, regp, NV_CIO_CRE_LCD__INDEX);

drivers/gpu/drm/nouveau/dispnv04/hw.c

716

wr_cio_state(dev, head, regp, NV_CIO_CRE_LCD__INDEX);

drivers/gpu/drm/nouveau/dispnv04/tvnv04.c

116

NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,

drivers/gpu/drm/nouveau/dispnv04/tvnv04.c

117

state->CRTC[NV_CIO_CRE_LCD__INDEX]);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

411

NV_CIO_CRE_LCD__INDEX];