drivers/gpu/drm/nouveau/dispnv50/crc.c

235

NV_ATOMIC(drm,

drivers/gpu/drm/nouveau/dispnv50/crc.c

261

NV_ATOMIC(nouveau_drm(crtc->dev),

drivers/gpu/drm/nouveau/dispnv50/crc.c

345

NV_ATOMIC(nouveau_drm(crtc->dev),

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

116

NV_ATOMIC(drm, "Plane width/height must be equal for cursors\n");

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

121

NV_ATOMIC(drm, "Plane width must be equal to fb width for cursors (height can be larger though)\n");

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

126

NV_ATOMIC(drm, "Cursor planes do not support framebuffer offsets\n");

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

131

NV_ATOMIC(drm,

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

139

NV_ATOMIC(drm,

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

147

NV_ATOMIC(drm,

drivers/gpu/drm/nouveau/dispnv50/disp.c

1311

NV_ATOMIC(drm, "%s: mstm cleanup\n", mstm->outp->base.base.name);

drivers/gpu/drm/nouveau/dispnv50/disp.c

1340

NV_ATOMIC(drm, "%s: mstm prepare\n", mstm->outp->base.base.name);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2114

NV_ATOMIC(drm, "commit core %08x\n", interlock[NV50_DISP_INTERLOCK_BASE]);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2185

NV_ATOMIC(drm, "commit %d %d\n", atom->lock_core, atom->flush_disable);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2201

NV_ATOMIC(drm, "%s: clr %04x (set %04x)\n", crtc->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2220

NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", plane->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2236

NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", encoder->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2269

NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", encoder->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2284

NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2335

NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2349

NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", plane->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

342

NV_ATOMIC(drm, "%s atomic_check\n", encoder->name);

drivers/gpu/drm/nouveau/dispnv50/disp.c

910

NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name);

drivers/gpu/drm/nouveau/dispnv50/disp.c

939

NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);

drivers/gpu/drm/nouveau/dispnv50/head.c

240

NV_ATOMIC(drm, "Invalid size %d for degamma on [CRTC:%d:%s]\n",

drivers/gpu/drm/nouveau/dispnv50/head.c

272

NV_ATOMIC(drm, "Invalid size %d for gamma on [CRTC:%d:%s]\n",

drivers/gpu/drm/nouveau/dispnv50/head.c

350

NV_ATOMIC(drm, "%s atomic_check %d\n", crtc->name, asyh->state.active);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

205

NV_ATOMIC(drm, "%s release\n", wndw->plane.name);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

286

NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

456

NV_ATOMIC(drm, "%s atomic_check\n", plane->name);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

529

NV_ATOMIC(drm, "%s cleanup: %p\n", plane->name, old_state->fb);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

549

NV_ATOMIC(drm, "%s prepare: %p\n", plane->name, fb);