NV_ALIGN_BYTES

21

NvU64 entryValue NV_ALIGN_BYTES(8);

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NvU64 entryLevelShift NV_ALIGN_BYTES(8);

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NvP64 pControl NV_ALIGN_BYTES(8); // pControl gives virt addr of control region for PIO channel

733

NvP64 pControl NV_ALIGN_BYTES(8); // pControl gives virt addr of UDISP GET/PUT regs

68

} pte_pde[] NV_ALIGN_BYTES(8); // PTE when IDR==0; PDE when IDR > 0

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NvU64 length NV_ALIGN_BYTES(8);

17

NvU64 vaSize NV_ALIGN_BYTES(8);

18

NvU64 vaStartInternal NV_ALIGN_BYTES(8);

19

NvU64 vaLimitInternal NV_ALIGN_BYTES(8);

21

NvU64 vaBase NV_ALIGN_BYTES(8);

333

NvP64 pControl NV_ALIGN_BYTES(8); // pControl gives virt addr of UDISP GET/PUT regs