drivers/gpu/drm/nouveau/dispnv50/base507c.c

100

NVVAL(NV507C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/base507c.c

103

NVVAL(NV507C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout) |

drivers/gpu/drm/nouveau/dispnv50/base507c.c

104

NVVAL(NV507C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |

drivers/gpu/drm/nouveau/dispnv50/base507c.c

105

NVVAL(NV507C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/base507c.c

106

NVVAL(NV507C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh),

drivers/gpu/drm/nouveau/dispnv50/base507c.c

109

NVVAL(NV507C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/base507c.c

113

NVVAL(NV507C, SURFACE_SET_PARAMS, KIND, asyw->image.kind) |

drivers/gpu/drm/nouveau/dispnv50/base507c.c

181

NVVAL(NV507C, SET_NOTIFIER_CONTROL, MODE, asyw->ntfy.awaken) |

drivers/gpu/drm/nouveau/dispnv50/base507c.c

182

NVVAL(NV507C, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 2),

drivers/gpu/drm/nouveau/dispnv50/base507c.c

59

NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, 0));

drivers/gpu/drm/nouveau/dispnv50/base507c.c

75

NVVAL(NV507C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |

drivers/gpu/drm/nouveau/dispnv50/base507c.c

76

NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));

drivers/gpu/drm/nouveau/dispnv50/base507c.c

85

NVVAL(NV507C, SET_CONVERSION, GAIN, 0) |

drivers/gpu/drm/nouveau/dispnv50/base507c.c

86

NVVAL(NV507C, SET_CONVERSION, OFS, 0x64));

drivers/gpu/drm/nouveau/dispnv50/base507c.c

92

NVVAL(NV507C, SET_CONVERSION, GAIN, 0) |

drivers/gpu/drm/nouveau/dispnv50/base507c.c

93

NVVAL(NV507C, SET_CONVERSION, OFS, 0));

drivers/gpu/drm/nouveau/dispnv50/base507c.c

99

NVVAL(NV507C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/base827c.c

38

NVVAL(NV827C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |

drivers/gpu/drm/nouveau/dispnv50/base827c.c

39

NVVAL(NV827C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));

drivers/gpu/drm/nouveau/dispnv50/base827c.c

48

NVVAL(NV827C, SET_CONVERSION, GAIN, 0) |

drivers/gpu/drm/nouveau/dispnv50/base827c.c

49

NVVAL(NV827C, SET_CONVERSION, OFS, 0x64));

drivers/gpu/drm/nouveau/dispnv50/base827c.c

55

NVVAL(NV827C, SET_CONVERSION, GAIN, 0) |

drivers/gpu/drm/nouveau/dispnv50/base827c.c

56

NVVAL(NV827C, SET_CONVERSION, OFS, 0));

drivers/gpu/drm/nouveau/dispnv50/base827c.c

63

NVVAL(NV827C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/base827c.c

64

NVVAL(NV827C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/base827c.c

67

NVVAL(NV827C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |

drivers/gpu/drm/nouveau/dispnv50/base827c.c

68

NVVAL(NV827C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |

drivers/gpu/drm/nouveau/dispnv50/base827c.c

69

NVVAL(NV827C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/base827c.c

70

NVVAL(NV827C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),

drivers/gpu/drm/nouveau/dispnv50/base827c.c

73

NVVAL(NV827C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/base907c.c

181

NVVAL(NV907C, SET_CSC_RED2RED, COEFF, asyw->csc.matrix[0]),

drivers/gpu/drm/nouveau/dispnv50/base907c.c

38

NVVAL(NV907C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |

drivers/gpu/drm/nouveau/dispnv50/base907c.c

40

NVVAL(NV907C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));

drivers/gpu/drm/nouveau/dispnv50/base907c.c

48

NVVAL(NV907C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/base907c.c

49

NVVAL(NV907C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/base907c.c

52

NVVAL(NV907C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |

drivers/gpu/drm/nouveau/dispnv50/base907c.c

53

NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |

drivers/gpu/drm/nouveau/dispnv50/base907c.c

54

NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/base907c.c

55

NVVAL(NV907C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),

drivers/gpu/drm/nouveau/dispnv50/base907c.c

58

NVVAL(NV907C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/base907c.c

94

NVVAL(NV907C, SET_BASE_LUT_LO, ENABLE, asyw->xlut.i.enable) |

drivers/gpu/drm/nouveau/dispnv50/base907c.c

95

NVVAL(NV907C, SET_BASE_LUT_LO, MODE, asyw->xlut.i.mode),

drivers/gpu/drm/nouveau/dispnv50/core507d.c

45

NVVAL(NV507D, SET_NOTIFIER_CONTROL, OFFSET, NV50_DISP_CORE_NTFY >> 2) |

drivers/gpu/drm/nouveau/dispnv50/core507d.c

92

NVVAL(NV507D, SET_NOTIFIER_CONTROL, OFFSET, NV50_DISP_CORE_NTFY >> 2) |

drivers/gpu/drm/nouveau/dispnv50/corec37d.c

150

NVVAL(NVC37D, WINDOW_SET_WINDOW_USAGE_BOUNDS, MAX_PIXELS_FETCHED_PER_LINE, 0x7fff) |

drivers/gpu/drm/nouveau/dispnv50/corec37d.c

63

NVVAL(NVC37D, SET_NOTIFIER_CONTROL, OFFSET, NV50_DISP_CORE_NTFY >> 4) |

drivers/gpu/drm/nouveau/dispnv50/corec57d.c

52

NVVAL(NVC57D, WINDOW_SET_WINDOW_USAGE_BOUNDS, MAX_PIXELS_FETCHED_PER_LINE, 0x7fff) |

drivers/gpu/drm/nouveau/dispnv50/coreca7d.c

32

NVVAL(NVCA7D, SET_SURFACE_ADDRESS_LO_NOTIFIER, ADDRESS_LO, ntfy_lo >> 4) |

drivers/gpu/drm/nouveau/dispnv50/coreca7d.c

78

NVVAL(NVCA7D, WINDOW_SET_WINDOW_USAGE_BOUNDS, MAX_PIXELS_FETCHED_PER_LINE, 0x7fff) |

drivers/gpu/drm/nouveau/dispnv50/crcc37d.c

20

u32 crc_args = NVVAL(NVC37D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, i * 4) |

drivers/gpu/drm/nouveau/dispnv50/crcca7d.c

31

NVVAL(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_CRC, ADDRESS_LO, crc_lo >> 4) |

drivers/gpu/drm/nouveau/dispnv50/crcca7d.c

82

NVVAL(NVCA7D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, primary_crc) |

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

65

NVVAL(NV507A, SET_CURSOR_HOT_SPOT_POINT_OUT, X, asyw->point.x) |

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

66

NVVAL(NV507A, SET_CURSOR_HOT_SPOT_POINT_OUT, Y, asyw->point.y));

drivers/gpu/drm/nouveau/dispnv50/cursc37a.c

44

NVVAL(NVC37A, SET_CURSOR_HOT_SPOT_POINT_OUT, X, asyw->point.x) |

drivers/gpu/drm/nouveau/dispnv50/cursc37a.c

45

NVVAL(NVC37A, SET_CURSOR_HOT_SPOT_POINT_OUT, Y, asyw->point.y));

drivers/gpu/drm/nouveau/dispnv50/dac507d.c

37

sync |= NVVAL(NV507D, DAC_SET_POLARITY, HSYNC, asyh->or.nhsync);

drivers/gpu/drm/nouveau/dispnv50/dac507d.c

38

sync |= NVVAL(NV507D, DAC_SET_POLARITY, VSYNC, asyh->or.nvsync);

drivers/gpu/drm/nouveau/dispnv50/disp.c

1551

nv_encoder->ctrl |= NVVAL(NV507D, SOR_SET_CONTROL, PROTOCOL, proto);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2758

outp->ctrl = NVVAL(NV507D, SOR_SET_CONTROL, PROTOCOL, proto) | BIT(crtc->index);

drivers/gpu/drm/nouveau/dispnv50/head507d.c

151

NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

152

NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

153

NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

154

NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

213

NVVAL(NV507D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

216

NVVAL(NV507D, HEAD_SET_SIZE, WIDTH, asyh->core.w) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

217

NVVAL(NV507D, HEAD_SET_SIZE, HEIGHT, asyh->core.h),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

220

NVVAL(NV507D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

221

NVVAL(NV507D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

222

NVVAL(NV507D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

223

NVVAL(NV507D, HEAD_SET_STORAGE, MEMORY_LAYOUT, asyh->core.layout),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

226

NVVAL(NV507D, HEAD_SET_PARAMS, FORMAT, asyh->core.format) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

227

NVVAL(NV507D, HEAD_SET_PARAMS, KIND, asyh->core.kind) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

231

NVVAL(NV507D, HEAD_SET_CONTEXT_DMA_ISO, HANDLE, asyh->core.handle));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

234

NVVAL(NV507D, HEAD_SET_VIEWPORT_POINT_IN, X, asyh->core.x) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

235

NVVAL(NV507D, HEAD_SET_VIEWPORT_POINT_IN, Y, asyh->core.y));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

305

NVVAL(NV507D, HEAD_SET_BASE_LUT_LO, MODE, asyh->olut.mode) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

306

NVVAL(NV507D, HEAD_SET_BASE_LUT_LO, ORIGIN, 0),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

309

NVVAL(NV507D, HEAD_SET_BASE_LUT_HI, ORIGIN, asyh->olut.offset >> 8));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

357

NVVAL(NV507D, HEAD_SET_PIXEL_CLOCK, FREQUENCY, m->clock) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

363

NVVAL(NV507D, HEAD_SET_CONTROL, STRUCTURE, m->interlace));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

366

NVVAL(NV507D, HEAD_SET_OVERSCAN_COLOR, RED, 0) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

367

NVVAL(NV507D, HEAD_SET_OVERSCAN_COLOR, GRN, 0) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

368

NVVAL(NV507D, HEAD_SET_OVERSCAN_COLOR, BLU, 0),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

371

NVVAL(NV507D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

372

NVVAL(NV507D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

375

NVVAL(NV507D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

376

NVVAL(NV507D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

379

NVVAL(NV507D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

380

NVVAL(NV507D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

383

NVVAL(NV507D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

384

NVVAL(NV507D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

387

NVVAL(NV507D, HEAD_SET_RASTER_VERT_BLANK2, YSTART, m->v.blank2s) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

388

NVVAL(NV507D, HEAD_SET_RASTER_VERT_BLANK2, YEND, m->v.blank2e),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

391

NVVAL(NV507D, HEAD_SET_RASTER_VERT_BLANK_DMI, DURATION, m->v.blankus));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

394

NVVAL(NV507D, HEAD_SET_DEFAULT_BASE_COLOR, RED, 0) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

395

NVVAL(NV507D, HEAD_SET_DEFAULT_BASE_COLOR, GREEN, 0) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

396

NVVAL(NV507D, HEAD_SET_DEFAULT_BASE_COLOR, BLUE, 0));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

413

NVVAL(NV507D, HEAD_SET_CONTROL_OUTPUT_SCALER, HRESPONSE_BIAS, 0) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

414

NVVAL(NV507D, HEAD_SET_CONTROL_OUTPUT_SCALER, VRESPONSE_BIAS, 0));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

417

NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_IN, WIDTH, asyh->view.iW) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

418

NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_IN, HEIGHT, asyh->view.iH));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

42

NVVAL(NV507D, HEAD_SET_PROCAMP, SAT_COS, asyh->procamp.sat.cos) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

421

NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_OUT, WIDTH, asyh->view.oW) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

422

NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_OUT, HEIGHT, asyh->view.oH),

drivers/gpu/drm/nouveau/dispnv50/head507d.c

425

NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, WIDTH, asyh->view.oW) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

426

NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, HEIGHT, asyh->view.oH));

drivers/gpu/drm/nouveau/dispnv50/head507d.c

43

NVVAL(NV507D, HEAD_SET_PROCAMP, SAT_SINE, asyh->procamp.sat.sin) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

59

NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

60

NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

61

NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |

drivers/gpu/drm/nouveau/dispnv50/head507d.c

62

NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, PHASE, 0));

drivers/gpu/drm/nouveau/dispnv50/head827d.c

102

NVVAL(NV827D, HEAD_SET_CONTEXT_DMAS_ISO, HANDLE, asyh->core.handle));

drivers/gpu/drm/nouveau/dispnv50/head827d.c

105

NVVAL(NV827D, HEAD_SET_VIEWPORT_POINT_IN, X, asyh->core.x) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

106

NVVAL(NV827D, HEAD_SET_VIEWPORT_POINT_IN, Y, asyh->core.y));

drivers/gpu/drm/nouveau/dispnv50/head827d.c

139

NVVAL(NV827D, HEAD_SET_BASE_LUT_LO, MODE, asyh->olut.mode) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

140

NVVAL(NV827D, HEAD_SET_BASE_LUT_LO, ORIGIN, 0),

drivers/gpu/drm/nouveau/dispnv50/head827d.c

143

NVVAL(NV827D, HEAD_SET_BASE_LUT_HI, ORIGIN, asyh->olut.offset >> 8));

drivers/gpu/drm/nouveau/dispnv50/head827d.c

60

NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

61

NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

62

NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

63

NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

84

NVVAL(NV827D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8));

drivers/gpu/drm/nouveau/dispnv50/head827d.c

87

NVVAL(NV827D, HEAD_SET_SIZE, WIDTH, asyh->core.w) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

88

NVVAL(NV827D, HEAD_SET_SIZE, HEIGHT, asyh->core.h),

drivers/gpu/drm/nouveau/dispnv50/head827d.c

91

NVVAL(NV827D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

92

NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

93

NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) |

drivers/gpu/drm/nouveau/dispnv50/head827d.c

94

NVVAL(NV827D, HEAD_SET_STORAGE, MEMORY_LAYOUT, asyh->core.layout),

drivers/gpu/drm/nouveau/dispnv50/head827d.c

97

NVVAL(NV827D, HEAD_SET_PARAMS, FORMAT, asyh->core.format) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

183

NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

184

NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

185

NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

186

NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

220

NVVAL(NV907D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

223

NVVAL(NV907D, HEAD_SET_SIZE, WIDTH, asyh->core.w) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

224

NVVAL(NV907D, HEAD_SET_SIZE, HEIGHT, asyh->core.h),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

227

NVVAL(NV907D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

228

NVVAL(NV907D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

229

NVVAL(NV907D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

230

NVVAL(NV907D, HEAD_SET_STORAGE, MEMORY_LAYOUT, asyh->core.layout),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

233

NVVAL(NV907D, HEAD_SET_PARAMS, FORMAT, asyh->core.format) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

238

NVVAL(NV907D, HEAD_SET_CONTEXT_DMAS_ISO, HANDLE, asyh->core.handle));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

241

NVVAL(NV907D, HEAD_SET_VIEWPORT_POINT_IN, X, asyh->core.x) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

242

NVVAL(NV907D, HEAD_SET_VIEWPORT_POINT_IN, Y, asyh->core.y));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

275

NVVAL(NV907D, HEAD_SET_OUTPUT_LUT_LO, MODE, asyh->olut.mode) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

279

NVVAL(NV907D, HEAD_SET_OUTPUT_LUT_HI, ORIGIN, asyh->olut.offset >> 8));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

334

NVVAL(NV907D, HEAD_SET_OVERSCAN_COLOR, RED, 0) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

335

NVVAL(NV907D, HEAD_SET_OVERSCAN_COLOR, GRN, 0) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

336

NVVAL(NV907D, HEAD_SET_OVERSCAN_COLOR, BLU, 0),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

339

NVVAL(NV907D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

340

NVVAL(NV907D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

343

NVVAL(NV907D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

344

NVVAL(NV907D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

347

NVVAL(NV907D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

348

NVVAL(NV907D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

351

NVVAL(NV907D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

352

NVVAL(NV907D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

355

NVVAL(NV907D, HEAD_SET_RASTER_VERT_BLANK2, YSTART, m->v.blank2s) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

356

NVVAL(NV907D, HEAD_SET_RASTER_VERT_BLANK2, YEND, m->v.blank2e));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

359

NVVAL(NV907D, HEAD_SET_DEFAULT_BASE_COLOR, RED, 0) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

360

NVVAL(NV907D, HEAD_SET_DEFAULT_BASE_COLOR, GREEN, 0) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

361

NVVAL(NV907D, HEAD_SET_DEFAULT_BASE_COLOR, BLUE, 0));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

364

NVVAL(NV907D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

373

NVVAL(NV907D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

391

NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_SCALER, HRESPONSE_BIAS, 0) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

392

NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_SCALER, VRESPONSE_BIAS, 0));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

395

NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_IN, WIDTH, asyh->view.iW) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

396

NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_IN, HEIGHT, asyh->view.iH));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

399

NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT, WIDTH, asyh->view.oW) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

400

NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT, HEIGHT, asyh->view.oH),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

403

NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, WIDTH, asyh->view.oW) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

404

NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, HEIGHT, asyh->view.oH),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

407

NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MAX, WIDTH, asyh->view.oW) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

408

NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MAX, HEIGHT, asyh->view.oH));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

47

NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

48

NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

49

NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

50

NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, asyh->or.depth),

drivers/gpu/drm/nouveau/dispnv50/head907d.c

53

NVVAL(NV907D, HEAD_SET_CONTROL, STRUCTURE, asyh->mode.interlace));

drivers/gpu/drm/nouveau/dispnv50/head907d.c

70

NVVAL(NV907D, HEAD_SET_PROCAMP, SAT_COS, asyh->procamp.sat.cos) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

71

NVVAL(NV907D, HEAD_SET_PROCAMP, SAT_SINE, asyh->procamp.sat.sin) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

88

NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

89

NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

90

NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

91

NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, PHASE, 0));

drivers/gpu/drm/nouveau/dispnv50/head917d.c

41

NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |

drivers/gpu/drm/nouveau/dispnv50/head917d.c

42

NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |

drivers/gpu/drm/nouveau/dispnv50/head917d.c

43

NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |

drivers/gpu/drm/nouveau/dispnv50/head917d.c

44

NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0));

drivers/gpu/drm/nouveau/dispnv50/head917d.c

90

NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |

drivers/gpu/drm/nouveau/dispnv50/head917d.c

91

NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |

drivers/gpu/drm/nouveau/dispnv50/head917d.c

92

NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |

drivers/gpu/drm/nouveau/dispnv50/head917d.c

93

NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

100

NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, PHASE, 0));

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

134

NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

135

NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

136

NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

137

NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

141

NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR_COMPOSITION, K1, 0xff) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

186

NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT, SIZE, asyh->olut.size) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

187

NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT, RANGE, asyh->olut.range) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

188

NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT, OUTPUT_MODE, asyh->olut.output_mode),

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

221

NVVAL(NVC37D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

222

NVVAL(NVC37D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active),

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

225

NVVAL(NVC37D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

226

NVVAL(NVC37D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce),

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

229

NVVAL(NVC37D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

230

NVVAL(NVC37D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke),

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

233

NVVAL(NVC37D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

234

NVVAL(NVC37D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks));

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

241

NVVAL(NVC37D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

244

NVVAL(NVC37D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

265

NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_IN, WIDTH, asyh->view.iW) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

266

NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_IN, HEIGHT, asyh->view.iH));

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

269

NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_OUT, WIDTH, asyh->view.oW) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

270

NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_OUT, HEIGHT, asyh->view.oH));

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

56

NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

57

NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

58

NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

59

NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, depth) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

77

NVVAL(NVC37D, HEAD_SET_PROCAMP, SAT_COS, asyh->procamp.sat.cos) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

78

NVVAL(NVC37D, HEAD_SET_PROCAMP, SAT_SINE, asyh->procamp.sat.sin) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

96

NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

97

NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

99

NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

121

NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, INTERPOLATE, asyh->olut.output_mode) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

123

NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, MODE, asyh->olut.mode) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

124

NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, SIZE, asyh->olut.size),

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

213

NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

214

NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active),

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

217

NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

218

NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce),

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

221

NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

222

NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke),

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

225

NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

226

NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks));

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

233

NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

236

NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

69

NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

70

NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

71

NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) |

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

72

NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, depth) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

101

NVVAL(NVCA7D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

102

NVVAL(NVCA7D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

104

NVVAL(NVCA7D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

105

NVVAL(NVCA7D, HEAD_SET_DITHER_CONTROL, PHASE, 0));

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

147

NVVAL(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_CURSOR, ADDRESS_LO, curs_lo >> 4) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

153

NVVAL(NVCA7D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

154

NVVAL(NVCA7D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

155

NVVAL(NVCA7D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

156

NVVAL(NVCA7D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0),

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

159

NVVAL(NVCA7D, HEAD_SET_CONTROL_CURSOR_COMPOSITION, K1, 0xff) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

202

NVVAL(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_OLUT, ADDRESS_LO, olut_lo >> 4) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

207

NVVAL(NVCA7D, HEAD_SET_OLUT_CONTROL, INTERPOLATE, asyh->olut.output_mode) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

209

NVVAL(NVCA7D, HEAD_SET_OLUT_CONTROL, MODE, asyh->olut.mode) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

210

NVVAL(NVCA7D, HEAD_SET_OLUT_CONTROL, SIZE, asyh->olut.size),

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

230

NVVAL(NVCA7D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

231

NVVAL(NVCA7D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active),

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

234

NVVAL(NVCA7D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

235

NVVAL(NVCA7D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce),

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

238

NVVAL(NVCA7D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

239

NVVAL(NVCA7D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke),

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

242

NVVAL(NVCA7D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

243

NVVAL(NVCA7D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks));

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

249

NVVAL(NVCA7D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

252

NVVAL(NVCA7D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

269

NVVAL(NVCA7D, HEAD_SET_VIEWPORT_SIZE_IN, WIDTH, asyh->view.iW) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

270

NVVAL(NVCA7D, HEAD_SET_VIEWPORT_SIZE_IN, HEIGHT, asyh->view.iH));

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

273

NVVAL(NVCA7D, HEAD_SET_VIEWPORT_SIZE_OUT, WIDTH, asyh->view.oW) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

274

NVVAL(NVCA7D, HEAD_SET_VIEWPORT_SIZE_OUT, HEIGHT, asyh->view.oH));

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

60

NVVAL(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

61

NVVAL(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

62

NVVAL(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) |

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

63

NVVAL(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, depth) |

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

43

NVVAL(NV507E, SET_POINT_IN, X, asyw->scale.sx) |

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

44

NVVAL(NV507E, SET_POINT_IN, Y, asyw->scale.sy),

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

47

NVVAL(NV507E, SET_SIZE_IN, WIDTH, asyw->scale.sw) |

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

48

NVVAL(NV507E, SET_SIZE_IN, HEIGHT, asyw->scale.sh),

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

51

NVVAL(NV507E, SET_SIZE_OUT, WIDTH, asyw->scale.dw));

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

66

NVVAL(NV507E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

76

NVVAL(NV507E, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

77

NVVAL(NV507E, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

80

NVVAL(NV507E, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

81

NVVAL(NV507E, SURFACE_SET_STORAGE, PITCH, (asyw->image.pitch[0] >> 8)) |

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

82

NVVAL(NV507E, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

83

NVVAL(NV507E, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

86

NVVAL(NV507E, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

87

NVVAL(NV507E, SURFACE_SET_PARAMS, COLOR_SPACE, asyw->image.colorspace) |

drivers/gpu/drm/nouveau/dispnv50/ovly507e.c

88

NVVAL(NV507E, SURFACE_SET_PARAMS, KIND, asyw->image.kind) |

drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

43

NVVAL(NV827E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));

drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

53

NVVAL(NV827E, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

54

NVVAL(NV827E, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

57

NVVAL(NV827E, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |

drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

58

NVVAL(NV827E, SURFACE_SET_STORAGE, PITCH, (asyw->image.pitch[0] >> 8)) |

drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

59

NVVAL(NV827E, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

60

NVVAL(NV827E, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),

drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

63

NVVAL(NV827E, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

64

NVVAL(NV827E, SURFACE_SET_PARAMS, COLOR_SPACE, asyw->image.colorspace));

drivers/gpu/drm/nouveau/dispnv50/ovly907e.c

40

NVVAL(NV907E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));

drivers/gpu/drm/nouveau/dispnv50/ovly907e.c

50

NVVAL(NV907E, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/ovly907e.c

51

NVVAL(NV907E, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/ovly907e.c

54

NVVAL(NV907E, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |

drivers/gpu/drm/nouveau/dispnv50/ovly907e.c

55

NVVAL(NV907E, SURFACE_SET_STORAGE, PITCH, (asyw->image.pitch[0] >> 8)) |

drivers/gpu/drm/nouveau/dispnv50/ovly907e.c

56

NVVAL(NV907E, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/ovly907e.c

57

NVVAL(NV907E, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),

drivers/gpu/drm/nouveau/dispnv50/ovly907e.c

60

NVVAL(NV907E, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/ovly907e.c

61

NVVAL(NV907E, SURFACE_SET_PARAMS, COLOR_SPACE, asyw->image.colorspace));

drivers/gpu/drm/nouveau/dispnv50/pior507d.c

37

ctrl |= NVVAL(NV507D, PIOR_SET_CONTROL, HSYNC_POLARITY, asyh->or.nhsync);

drivers/gpu/drm/nouveau/dispnv50/pior507d.c

38

ctrl |= NVVAL(NV507D, PIOR_SET_CONTROL, VSYNC_POLARITY, asyh->or.nvsync);

drivers/gpu/drm/nouveau/dispnv50/pior507d.c

39

ctrl |= NVVAL(NV837D, PIOR_SET_CONTROL, PIXEL_DEPTH, asyh->or.depth);

drivers/gpu/drm/nouveau/dispnv50/sor507d.c

37

ctrl |= NVVAL(NV507D, SOR_SET_CONTROL, HSYNC_POLARITY, asyh->or.nhsync);

drivers/gpu/drm/nouveau/dispnv50/sor507d.c

38

ctrl |= NVVAL(NV507D, SOR_SET_CONTROL, VSYNC_POLARITY, asyh->or.nvsync);

drivers/gpu/drm/nouveau/dispnv50/sor507d.c

39

ctrl |= NVVAL(NV837D, SOR_SET_CONTROL, PIXEL_DEPTH, asyh->or.depth);

drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c

41

NVVAL(NVC37B, UPDATE, INTERLOCK_WITH_WINDOW,

drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c

56

NVVAL(NVC37B, SET_POINT_OUT, X, asyw->point.x) |

drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c

57

NVVAL(NVC37B, SET_POINT_OUT, Y, asyw->point.y));

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

106

NVVAL(NVC37E, SET_COMPOSITION_CONTROL, DEPTH, asyw->blend.depth),

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

109

NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K1, asyw->blend.k1) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

110

NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K2, 0),

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

113

NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, SRC_COLOR_FACTOR_MATCH_SELECT,

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

115

NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, SRC_COLOR_FACTOR_NO_MATCH_SELECT,

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

117

NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, DST_COLOR_FACTOR_MATCH_SELECT,

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

119

NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, DST_COLOR_FACTOR_NO_MATCH_SELECT,

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

123

NVVAL(NVC37E, SET_KEY_ALPHA, MIN, 0x0000) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

124

NVVAL(NVC37E, SET_KEY_ALPHA, MAX, 0xffff),

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

127

NVVAL(NVC37E, SET_KEY_RED_CR, MIN, 0x0000) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

128

NVVAL(NVC37E, SET_KEY_RED_CR, MAX, 0xffff),

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

131

NVVAL(NVC37E, SET_KEY_GREEN_Y, MIN, 0x0000) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

132

NVVAL(NVC37E, SET_KEY_GREEN_Y, MAX, 0xffff),

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

135

NVVAL(NVC37E, SET_KEY_BLUE_CB, MIN, 0x0000) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

136

NVVAL(NVC37E, SET_KEY_BLUE_CB, MAX, 0xffff));

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

150

NVVAL(NVC37E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, 0) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

167

NVVAL(NVC37E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

168

NVVAL(NVC37E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

172

NVVAL(NVC37E, SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

173

NVVAL(NVC37E, SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

176

NVVAL(NVC37E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

177

NVVAL(NVC37E, SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

180

NVVAL(NVC37E, SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

181

NVVAL(NVC37E, SET_PARAMS, COLOR_SPACE, asyw->image.colorspace) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

185

NVVAL(NVC37E, SET_PARAMS, CSC, asyw->csc.valid) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

190

NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

191

NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

197

NVVAL(NVC37E, SET_POINT_IN, X, asyw->state.src_x >> 16) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

198

NVVAL(NVC37E, SET_POINT_IN, Y, asyw->state.src_y >> 16));

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

201

NVVAL(NVC37E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

202

NVVAL(NVC37E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

205

NVVAL(NVC37E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

206

NVVAL(NVC37E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

235

NVVAL(NVC37E, SET_NOTIFIER_CONTROL, MODE, asyw->ntfy.awaken) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

236

NVVAL(NVC37E, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 4));

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

283

NVVAL(NVC37E, UPDATE, INTERLOCK_WITH_WIN_IMM,

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

76

NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, OUTPUT_MODE, asyw->xlut.i.output_mode) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

77

NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, RANGE, asyw->xlut.i.range) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

78

NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, SIZE, asyw->xlut.i.size),

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

135

NVVAL(NVC57E, SET_ILUT_CONTROL, SIZE, asyw->xlut.i.size) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

136

NVVAL(NVC57E, SET_ILUT_CONTROL, MODE, asyw->xlut.i.mode) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

137

NVVAL(NVC57E, SET_ILUT_CONTROL, INTERPOLATE, asyw->xlut.i.output_mode),

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

42

NVVAL(NVC57E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

43

NVVAL(NVC57E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

47

NVVAL(NVC57E, SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

48

NVVAL(NVC57E, SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

51

NVVAL(NVC57E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

52

NVVAL(NVC57E, SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

55

NVVAL(NVC57E, SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

61

NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

62

NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

68

NVVAL(NVC57E, SET_POINT_IN, X, asyw->state.src_x >> 16) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

69

NVVAL(NVC57E, SET_POINT_IN, Y, asyw->state.src_y >> 16));

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

72

NVVAL(NVC57E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

73

NVVAL(NVC57E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

76

NVVAL(NVC57E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) |

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

77

NVVAL(NVC57E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

39

NVVAL(NVC57E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) |

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

40

NVVAL(NVC57E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

44

NVVAL(NVC57E, SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

45

NVVAL(NVC57E, SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

48

NVVAL(NVC57E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh),

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

51

NVVAL(NVC57E, SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

57

NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

58

NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

64

NVVAL(NVC57E, SET_POINT_IN, X, asyw->state.src_x >> 16) |

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

65

NVVAL(NVC57E, SET_POINT_IN, Y, asyw->state.src_y >> 16));

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

68

NVVAL(NVC57E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) |

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

69

NVVAL(NVC57E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

72

NVVAL(NVC57E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) |

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

73

NVVAL(NVC57E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

127

NVVAL(NVCA7E, SET_SURFACE_ADDRESS_LO_ILUT, ADDRESS_LO, ilut_lo >> 4) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

132

NVVAL(NVCA7E, SET_ILUT_CONTROL, SIZE, asyw->xlut.i.size) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

133

NVVAL(NVCA7E, SET_ILUT_CONTROL, MODE, asyw->xlut.i.mode) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

134

NVVAL(NVCA7E, SET_ILUT_CONTROL, INTERPOLATE, asyw->xlut.i.output_mode));

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

172

NVVAL(NVCA7E, SET_SURFACE_ADDRESS_LO_NOTIFIER, ADDRESS_LO, ntfy_lo >> 4) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

177

NVVAL(NVCA7E, SET_NOTIFIER_CONTROL, MODE, asyw->ntfy.awaken));

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

25

NVVAL(NVCA7E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, 0) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

54

NVVAL(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, ADDRESS_LO, iso0_lo >> 4) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

56

NVVAL(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, KIND, kind) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

60

NVVAL(NVCA7E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

61

NVVAL(NVCA7E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

65

NVVAL(NVCA7E, SET_SIZE, WIDTH, asyw->image.w) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

66

NVVAL(NVCA7E, SET_SIZE, HEIGHT, asyw->image.h),

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

69

NVVAL(NVCA7E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh),

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

72

NVVAL(NVCA7E, SET_PARAMS, FORMAT, asyw->image.format) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

78

NVVAL(NVCA7E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

79

NVVAL(NVCA7E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

82

NVVAL(NVCA7E, SET_POINT_IN, X, asyw->state.src_x >> 16) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

83

NVVAL(NVCA7E, SET_POINT_IN, Y, asyw->state.src_y >> 16));

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

86

NVVAL(NVCA7E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

87

NVVAL(NVCA7E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

90

NVVAL(NVCA7E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) |

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

91

NVVAL(NVCA7E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));

drivers/gpu/drm/nouveau/include/nvif/push206e.h

10

NVVAL(NV206E, DMA, CALL_OFFSET, (o) >> 2), \

drivers/gpu/drm/nouveau/include/nvif/push507c.h

11

NVVAL(NV507C, DMA, METHOD_COUNT, (c)) | \

drivers/gpu/drm/nouveau/include/nvif/push507c.h

12

NVVAL(NV507C, DMA, METHOD_OFFSET, (m) >> 2), \

drivers/gpu/drm/nouveau/include/nvif/push507c.h

22

NVVAL(NV507C, DMA, JUMP_OFFSET, (o) >> 2), \

drivers/gpu/drm/nouveau/include/nvif/push906f.h

27

PUSH_DATA__((p), NVVAL(NV906F, DMA, METHOD_ADDRESS, (m) >> 2) | \

drivers/gpu/drm/nouveau/include/nvif/push906f.h

28

NVVAL(NV906F, DMA, METHOD_SUBCHANNEL, (s)) | \

drivers/gpu/drm/nouveau/include/nvif/push906f.h

29

NVVAL(NV906F, DMA, METHOD_COUNT, (c)) | \

drivers/gpu/drm/nouveau/include/nvif/pushc37b.h

11

NVVAL(NVC37B, DMA, METHOD_COUNT, (c)) | \

drivers/gpu/drm/nouveau/include/nvif/pushc37b.h

12

NVVAL(NVC37B, DMA, METHOD_OFFSET, (m) >> 2), \

drivers/gpu/drm/nouveau/include/nvif/pushc97b.h

11

NVVAL(NVC97B, DMA, METHOD_COUNT, (c)) | \

drivers/gpu/drm/nouveau/include/nvif/pushc97b.h

12

NVVAL(NVC97B, DMA, METHOD_OFFSET, (m) >> 2), \

drivers/gpu/drm/nouveau/nouveau_bo0039.c

81

NVVAL(NV039, FORMAT, IN, 1) |

drivers/gpu/drm/nouveau/nouveau_bo0039.c

82

NVVAL(NV039, FORMAT, OUT, 1),

drivers/gpu/drm/nouveau/nouveau_bo5039.c

100

NVVAL(NV5039, SET_DST_ORIGIN, Y, 0));

drivers/gpu/drm/nouveau/nouveau_bo5039.c

107

NVVAL(NV5039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)),

drivers/gpu/drm/nouveau/nouveau_bo5039.c

110

NVVAL(NV5039, OFFSET_OUT_UPPER, VALUE, upper_32_bits(dst_offset)));

drivers/gpu/drm/nouveau/nouveau_bo5039.c

77

NVVAL(NV5039, SET_SRC_ORIGIN, X, 0) |

drivers/gpu/drm/nouveau/nouveau_bo5039.c

78

NVVAL(NV5039, SET_SRC_ORIGIN, Y, 0));

drivers/gpu/drm/nouveau/nouveau_bo5039.c

99

NVVAL(NV5039, SET_DST_ORIGIN, X, 0) |

drivers/gpu/drm/nouveau/nouveau_bo9039.c

57

NVVAL(NV9039, OFFSET_OUT_UPPER, VALUE, upper_32_bits(dst_offset)),

drivers/gpu/drm/nouveau/nouveau_bo9039.c

62

NVVAL(NV9039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)),

drivers/gpu/drm/nouveau/nouveau_boa0b5.c

50

NVVAL(NVA0B5, OFFSET_IN_UPPER, UPPER, upper_32_bits(mem->vma[0].addr)),

drivers/gpu/drm/nouveau/nouveau_boa0b5.c

55

NVVAL(NVA0B5, OFFSET_OUT_UPPER, UPPER, upper_32_bits(mem->vma[1].addr)),

drivers/gpu/drm/nouveau/nouveau_dmem.c

601

NVVAL(NVA0B5, OFFSET_IN_UPPER, UPPER, upper_32_bits(src_addr)),

drivers/gpu/drm/nouveau/nouveau_dmem.c

606

NVVAL(NVA0B5, OFFSET_OUT_UPPER, UPPER, upper_32_bits(dst_addr)),

drivers/gpu/drm/nouveau/nouveau_dmem.c

664

NVVAL(NVA0B5, OFFSET_OUT_UPPER, UPPER, upper_32_bits(dst_addr)),

drivers/gpu/drm/nouveau/nv84_fence.c

44

NVVAL(NV826F, SEMAPHOREA, OFFSET_UPPER, upper_32_bits(virtual)),

drivers/gpu/drm/nouveau/nv84_fence.c

67

NVVAL(NV826F, SEMAPHOREA, OFFSET_UPPER, upper_32_bits(virtual)),

drivers/gpu/drm/nouveau/nvc0_fence.c

41

NVVAL(NV906F, SEMAPHOREA, OFFSET_UPPER, upper_32_bits(virtual)),

drivers/gpu/drm/nouveau/nvc0_fence.c

64

NVVAL(NV906F, SEMAPHOREA, OFFSET_UPPER, upper_32_bits(virtual)),

drivers/gpu/drm/nouveau/nvif/chan906f.c

32

NVVAL(NV906F, SEMAPHOREA, OFFSET_UPPER, upper_32_bits(addr)),

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

214

msg.mctp_header = NVVAL(MCTP, HEADER, SOM, 1) |

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

215

NVVAL(MCTP, HEADER, EOM, 1) |

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

216

NVVAL(MCTP, HEADER, SEID, 0) |

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

217

NVVAL(MCTP, HEADER, SEQ, 0);

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

221

NVVAL(MCTP, MSG_HEADER, NVDM_TYPE, NVDM_TYPE_COT);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

958

ctrl->data[i] = NVVAL(NV0073_CTRL, DP_LANE_DATA, PREEMPHASIS, pe[i]) |

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

959

NVVAL(NV0073_CTRL, DP_LANE_DATA, DRIVECURRENT, vs[i]);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

975

data = NVVAL(NV0073_CTRL, DP_DATA, SET_LANE_COUNT, link_nr) |

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

976

NVVAL(NV0073_CTRL, DP_DATA, SET_LINK_BW, link_bw) |

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

977

NVVAL(NV0073_CTRL, DP_DATA, TARGET, target);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c

105

args->flags |= NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_VALUE, userd_i);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c

107

args->flags |= NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_VALUE, userd_p);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c

97

args->flags |= NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, runq);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/fifo.c

42

args->flags |= NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, runq);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/fifo.c

50

args->flags |= NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_VALUE, userd_i);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/fifo.c

52

args->flags |= NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_VALUE, userd_p);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgh100.c

273

map->type |= NVVAL(NV_MMU, VER3_PTE, APERTURE, aper);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgh100.c

274

map->type |= NVVAL(NV_MMU, VER3_PTE, PCF, pcf);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgh100.c

275

map->type |= NVVAL(NV_MMU, VER3_PTE, KIND, kind);