drivers/gpu/drm/nouveau/dispnv04/crtc.c

226

seq1 |= (NVReadVgaSeq(dev, nv_crtc->index, NV_VIO_SR_CLOCK_INDEX) & ~0x20);

drivers/gpu/drm/nouveau/dispnv04/dac.c

157

saved_seq1 = NVReadVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX);

drivers/gpu/drm/nouveau/dispnv04/hw.c

117

seq1 = NVReadVgaSeq(dev, head, NV_VIO_SR_CLOCK_INDEX);

drivers/gpu/drm/nouveau/dispnv04/hw.c

344

seq2 = NVReadVgaSeq(dev, 0, NV_VIO_SR_PLANE_MASK_INDEX);

drivers/gpu/drm/nouveau/dispnv04/hw.c

345

seq4 = NVReadVgaSeq(dev, 0, NV_VIO_SR_MEM_MODE_INDEX);

drivers/gpu/drm/nouveau/dispnv04/hw.c

560

regp->Sequencer[i] = NVReadVgaSeq(dev, head, i);

drivers/gpu/drm/nouveau/dispnv04/hw.h

245

uint8_t seq1 = NVReadVgaSeq(dev, head, NV_VIO_SR_CLOCK_INDEX);

drivers/gpu/drm/nouveau/dispnv04/hw.h

38

uint8_t NVReadVgaSeq(struct drm_device *, int head, uint8_t index);